Mesa (main): iris: Emit clear_params as part of cso_z->packets

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Module: Mesa
Branch: main
Commit: de7d8e53b72c6952e6ea16229cbcca28c141b56d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=de7d8e53b72c6952e6ea16229cbcca28c141b56d

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Thu Jun 17 09:39:50 2021 -0700

iris: Emit clear_params as part of cso_z->packets

This should be a bit faster.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11454>

---

 src/gallium/drivers/iris/iris_state.c | 41 ++++++++++++++++-------------------
 1 file changed, 19 insertions(+), 22 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 75af879273a..7cdf8bca13e 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -6230,12 +6230,27 @@ iris_upload_dirty_render_state(struct iris_context *ice,
    if (dirty & IRIS_DIRTY_DEPTH_BUFFER) {
       struct iris_depth_buffer_state *cso_z = &ice->state.genx->depth_buffer;
 
-      /* Do not emit the clear params yets. We need to update the clear value
-       * first.
-       */
+      /* Do not emit the cso yet. We may need to update clear params first. */
       uint32_t clear_length = GENX(3DSTATE_CLEAR_PARAMS_length) * 4;
       uint32_t cso_z_size = batch->screen->isl_dev.ds.size - clear_length;;
 
+      union isl_color_value clear_value = { .f32 = { 0, } };
+
+      struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
+      if (cso_fb->zsbuf) {
+         struct iris_resource *zres, *sres;
+         iris_get_depth_stencil_resources(cso_fb->zsbuf->texture,
+                                          &zres, &sres);
+         if (zres && zres->aux.bo)
+            clear_value = iris_resource_get_clear_color(zres, NULL, NULL);
+      }
+
+      uint32_t *clear_params = cso_z->packets + cso_z_size / 4;
+      iris_pack_command(GENX(3DSTATE_CLEAR_PARAMS), clear_params, clear) {
+         clear.DepthClearValueValid = true;
+         clear.DepthClearValue = clear_value.f32[0];
+      }
+
 #if GFX_VERx10 == 120
       /* Wa_14010455700
        *
@@ -6250,7 +6265,7 @@ iris_upload_dirty_render_state(struct iris_context *ice,
                                  PIPE_CONTROL_DEPTH_CACHE_FLUSH);
 #endif
 
-      iris_batch_emit(batch, cso_z->packets, cso_z_size);
+      iris_batch_emit(batch, cso_z->packets, batch->screen->isl_dev.ds.size);
       if (GFX_VER >= 12) {
          /* Wa_1408224581
           *
@@ -6264,24 +6279,6 @@ iris_upload_dirty_render_state(struct iris_context *ice,
                                       batch->screen->workaround_address.bo,
                                       batch->screen->workaround_address.offset, 0);
       }
-
-      union isl_color_value clear_value = { .f32 = { 0, } };
-
-      struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
-      if (cso_fb->zsbuf) {
-         struct iris_resource *zres, *sres;
-         iris_get_depth_stencil_resources(cso_fb->zsbuf->texture,
-                                          &zres, &sres);
-         if (zres && zres->aux.bo)
-            clear_value = iris_resource_get_clear_color(zres, NULL, NULL);
-      }
-
-      uint32_t *clear_params = cso_z->packets + cso_z_size / 4;
-      iris_pack_command(GENX(3DSTATE_CLEAR_PARAMS), clear_params, clear) {
-         clear.DepthClearValueValid = true;
-         clear.DepthClearValue = clear_value.f32[0];
-      }
-      iris_batch_emit(batch, clear_params, clear_length);
    }
 
    if (dirty & (IRIS_DIRTY_DEPTH_BUFFER | IRIS_DIRTY_WM_DEPTH_STENCIL)) {