Mesa (main): freedreno/a6xx: Rast updates for a6xx gen3

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Module: Mesa
Branch: main
Commit: 219e12b7f3905dc9bd666773be24eff2a7f6d3e8
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=219e12b7f3905dc9bd666773be24eff2a7f6d3e8

Author: Rob Clark <robdclark at chromium.org>
Date:   Sat Aug 21 11:00:22 2021 -0700

freedreno/a6xx: Rast updates for a6xx gen3

Not really sure what these new regs are, but blob emits them as part of
rasterizer state starting with a650.

Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497>

---

 src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c
index b08cbae32b6..367560a9536 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c
@@ -39,7 +39,7 @@ __fd6_setup_rasterizer_stateobj(struct fd_context *ctx,
                                 const struct pipe_rasterizer_state *cso,
                                 bool primitive_restart)
 {
-   struct fd_ringbuffer *ring = fd_ringbuffer_new_object(ctx->pipe, 18 * 4);
+   struct fd_ringbuffer *ring = fd_ringbuffer_new_object(ctx->pipe, 26 * 4);
    float psize_min, psize_max;
 
    if (cso->point_size_per_vertex) {
@@ -94,6 +94,20 @@ __fd6_setup_rasterizer_stateobj(struct fd_context *ctx,
    OUT_REG(ring, A6XX_VPC_POLYGON_MODE(mode));
    OUT_REG(ring, A6XX_PC_POLYGON_MODE(mode));
 
+   /* These started showing up in a6xx gen3, but so far I haven't found
+    * any example of blob setting them to anything other than zero.
+    *
+    * Probably not related to tess_use_shared, but that is a convenient
+    * thing to key off of until we find whatever new feature gen3 added
+    * that uses these registers.
+    */
+   if (ctx->screen->info->a6xx.tess_use_shared) {
+      OUT_REG(ring, A6XX_RB_UNKNOWN_8A00());
+      OUT_REG(ring, A6XX_RB_UNKNOWN_8A10());
+      OUT_REG(ring, A6XX_RB_UNKNOWN_8A20());
+      OUT_REG(ring, A6XX_RB_UNKNOWN_8A30());
+   }
+
    return ring;
 }