Mesa (main): intel/compiler: Move type_is_unsigned_int to brw_reg_type.h
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Mon Aug 30 21:11:44 UTC 2021
Module: Mesa
Branch: main
Commit: a9120eccff07e7581b582460cec1d6655a286fff
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9120eccff07e7581b582460cec1d6655a286fff
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Wed Aug 18 14:04:45 2021 -0700
intel/compiler: Move type_is_unsigned_int to brw_reg_type.h
...and rename it to brw_reg_type_is_unsigned_integer. It is now next to
brw_reg_type_is_floating_point and brw_reg_type_is_integer.
Reviewed-by: Marcin Ślusarz <marcin.slusarz at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12045>
---
src/intel/compiler/brw_fs.cpp | 2 +-
src/intel/compiler/brw_fs_cmod_propagation.cpp | 2 +-
src/intel/compiler/brw_reg.h | 9 ---------
src/intel/compiler/brw_reg_type.h | 9 +++++++++
src/intel/compiler/brw_vec4.cpp | 2 +-
src/intel/compiler/brw_vec4_nir.cpp | 2 +-
6 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 6853591f98d..61d44033b3b 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -475,7 +475,7 @@ fs_inst::can_do_cmod()
* equality with a 32-bit value. See piglit fs-op-neg-uvec4.
*/
for (unsigned i = 0; i < sources; i++) {
- if (type_is_unsigned_int(src[i].type) && src[i].negate)
+ if (brw_reg_type_is_unsigned_integer(src[i].type) && src[i].negate)
return false;
}
diff --git a/src/intel/compiler/brw_fs_cmod_propagation.cpp b/src/intel/compiler/brw_fs_cmod_propagation.cpp
index 5f30c3b1d23..044d8140e7e 100644
--- a/src/intel/compiler/brw_fs_cmod_propagation.cpp
+++ b/src/intel/compiler/brw_fs_cmod_propagation.cpp
@@ -125,7 +125,7 @@ cmod_propagate_cmp_to_add(const intel_device_info *devinfo, bblock_t *block,
if (scan_inst->saturate &&
(brw_reg_type_is_floating_point(scan_inst->dst.type) ||
- type_is_unsigned_int(scan_inst->dst.type)) &&
+ brw_reg_type_is_unsigned_integer(scan_inst->dst.type)) &&
(cond != BRW_CONDITIONAL_G &&
cond != BRW_CONDITIONAL_LE))
goto not_match;
diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index 4130e0a8b88..3bb49727183 100644
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -377,15 +377,6 @@ brw_int_type(unsigned sz, bool is_signed)
}
}
-static inline bool
-type_is_unsigned_int(enum brw_reg_type tp)
-{
- return tp == BRW_REGISTER_TYPE_UB ||
- tp == BRW_REGISTER_TYPE_UW ||
- tp == BRW_REGISTER_TYPE_UD ||
- tp == BRW_REGISTER_TYPE_UQ;
-}
-
/**
* Construct a brw_reg.
* \param file one of the BRW_x_REGISTER_FILE values
diff --git a/src/intel/compiler/brw_reg_type.h b/src/intel/compiler/brw_reg_type.h
index aaa753acb36..e124bc1054d 100644
--- a/src/intel/compiler/brw_reg_type.h
+++ b/src/intel/compiler/brw_reg_type.h
@@ -100,6 +100,15 @@ brw_reg_type_is_integer(enum brw_reg_type type)
}
}
+static inline bool
+brw_reg_type_is_unsigned_integer(enum brw_reg_type tp)
+{
+ return tp == BRW_REGISTER_TYPE_UB ||
+ tp == BRW_REGISTER_TYPE_UW ||
+ tp == BRW_REGISTER_TYPE_UD ||
+ tp == BRW_REGISTER_TYPE_UQ;
+}
+
/*
* Returns a type based on a reference_type (word, float, half-float) and a
* given bit_size.
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
index 347500a36f7..cd868f8eec2 100644
--- a/src/intel/compiler/brw_vec4.cpp
+++ b/src/intel/compiler/brw_vec4.cpp
@@ -263,7 +263,7 @@ vec4_instruction::can_do_cmod()
*/
for (unsigned i = 0; i < 3; i++) {
if (src[i].file != BAD_FILE &&
- type_is_unsigned_int(src[i].type) && src[i].negate)
+ brw_reg_type_is_unsigned_integer(src[i].type) && src[i].negate)
return false;
}
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 523cd394c52..435f79dad59 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -1112,7 +1112,7 @@ static bool
const_src_fits_in_16_bits(const nir_src &src, brw_reg_type type)
{
assert(nir_src_is_const(src));
- if (type_is_unsigned_int(type)) {
+ if (brw_reg_type_is_unsigned_integer(type)) {
return nir_src_comp_as_uint(src, 0) <= UINT16_MAX;
} else {
const int64_t c = nir_src_comp_as_int(src, 0);
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