Mesa (21.3): 38 new commits

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Dec 1 19:31:11 UTC 2021


URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9da08702b0cfde97ea2ef990ff888cf90d3dff4f
Author: Eric Engestrom <eric at engestrom.ch>
Date:   Wed Dec 1 19:04:14 2021 +0000

    VERSION: bump for 21.3.1

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec157bc04ddfc1b4198b1fd4c212721538b75f41
Author: Eric Engestrom <eric at engestrom.ch>
Date:   Wed Dec 1 18:56:57 2021 +0000

    docs: add release notes for 21.3.1

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae3b08fb97426d1304d865b299e23f5b50d485d8
Author: Mauro Rossi <issor.oruam at gmail.com>
Date:   Sat Nov 20 00:47:18 2021 +0100

    android: define cpp_rtti=false because libLLVM is built w/o RTTI (v2)
    
    libLLVM for Android is built without RTTI, but after commit ad86267
    mesa inherits meson default RTTI enabled state.
    
    cpp_rtti=false is added to meson options in android/mesa3d_cross.mk
    
    (v2) Add Fixes tag and use spaces instead of tabs for aligning the trailing \
    
    Signed-off-by: Mauro Rossi <issor.oruam at gmail.com>
    Fixes: ad862674 ("meson: Don't override built-in cpp_rtti option, error if it's invalid")
    Cc: "21.3" "21.2" mesa-stable
    Reviewed-by: Marijn Suijten <marijn.suijten at somainline.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13901>
    (cherry picked from commit 1ba231fb75be5bffd806cbd09ac285d1f8f15e3d)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf23b3e69a1c2db97ca92daea44a6a73878dd7de
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Mon Nov 29 16:34:15 2021 +0000

    aco: don't create DPP instructions with SGPR operands
    
    Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
    Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
    Fixes: 2e6834d4f6c ("aco: combine DPP into VALU before RA")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13976>
    (cherry picked from commit 6afba805349db4e4664065ad71ba6b99e62ff481)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=36659b347cabc907e043c5428eef0575da73075c
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Thu Nov 18 12:19:53 2021 +0100

    radv: fix resetting the entire vertex input dynamic state
    
    If there is holes, eg. the application firsts set vertex attributes
    0 and 1, then vertex attributes 0 and 7, the format of vertex attribute
    1 is still the previous one, while it should be FORMAT_INVALID to avoid
    a GPU hang.
    
    This fixes a GPU hang with Yuzu.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5627
    Cc: 21.3 mesa-stable
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
    Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13856>
    (cherry picked from commit 8f00f19da5b019b12396d2736c27a159d3eb1b21)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb5b523922a094fb1cd4a9a17884ee33e76dbf7d
Author: Mykhailo Skorokhodov <mykhailo.skorokhodov at globallogic.com>
Date:   Mon Nov 1 17:15:00 2021 +0200

    nir: Fix read depth for predecessors
    
    In some non-trivial cases (the amber script file in the merge
    request description) phi instruction has more than 32 elements
    in predecessors tree and that isn't recursion, just large tree.
    In that case, phis not fully converted into a register or mov,
    but successfully removed.
    
    The fix removes the counter and adds container of visited blocks.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3690
    Cc: mesa-stable
    Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov at globallogic.com>
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13710>
    (cherry picked from commit 391569e9110a3cd52b07fde7c1e8dd681458edfe)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=87bab0775060e3489d5ee5f90a5e0db1fa917cb1
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Fri Apr 16 13:18:33 2021 +0100

    nir/dce: fix DCE of loops with a halt or return instruction in the pre-header
    
    If there is a halt or return instruction right before a loop with a single
    continue, we would have taken the fast path intended for loops without
    continues.
    
    Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Tested-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Fixes: 71a985d80b1 ("nir/dce: perform DCE for unlooped instructions in a single pass")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10284>
    (cherry picked from commit 2fe13aa2ad7367d83a19da2332d9ec55cb3a3a6f)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae0988b09cecfe92b1dd24f994cc8c8215f1b0b5
Author: Vasily Khoruzhick <anarsoul at gmail.com>
Date:   Fri Nov 26 18:02:59 2021 -0800

    lima: disasm: use last argument as a filename
    
    Otherwise it fails to open a file.
    
    Fixes: 9660427ab7b3 ("lima: Print usage if --help is any of the arguments.")
    Reviewed-by: Andreas Baierl <ichgeh at imkreisrum.de>
    Signed-off-by: Vasily Khoruzhick <anarsoul at gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13968>
    (cherry picked from commit 711a4ccddbaa251cba5cbda36c684f5f642458e6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d36f814171fd3d07fdcefe23113a0d92ab9ac3ae
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Nov 24 18:22:23 2021 +0100

    radv: add a workaround to fix a segfault with Metro Exodus (Linux native)
    
    The game calls vkGetSemaphoreCounterValue() with an invalid semaphore
    handle and it crashes. This is an invalid Vulkan usage and it should
    be fixed in the game. I reported the issue to the developers.
    
    Workaround this temporarily (hopefully) by ignoring
    vkGetSemaphoreCounterValue() if the semaphore is NULL from an internal
    RADV layer.
    
    Cc: 21.3 mesa-stable
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5119
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13956>
    (cherry picked from commit 990a8ee5eb9c78ae0f675bd6baf0850e4031b9f3)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d5d2a1558e2a870835adc5418b01b789b264fb9
Author: Erico Nunes <nunes.erico at gmail.com>
Date:   Wed Nov 17 12:01:03 2021 +0100

    ci: temporarily disable lima CI
    
    The lima board farm will be unavailable for a few days, so disable it
    to avoid CI failures.
    
    Signed-off-by: Erico Nunes <nunes.erico at gmail.com>
    Reviewed-by: Vasily Khoruzhick <anarsoul at gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13595>
    (cherry picked from commit ee2e14b352b3f5c07b18fcbbc5f6b1cacd64e0ed)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f2e24f53fbb5ddf0ae48ef01bdd253f3cde929b
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date:   Sun Nov 21 01:06:09 2021 +0200

    util/u_trace: refcount payloads
    
    When cloning a chunk of tracepoints, we cannot just copy the elements
    of the traces[] array. We also need the payloads associated with
    those.
    
    This change introduces a new u_trace_payloaf_buf object that is
    refcounted so that we can easily import traces[] elements and their
    payloads from one utrace to another.
    
    v2: use u_vector (Danylo)
    
    v3: Delete outdate comment (Danylo)
        Fix assert (Danylo)
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Fixes: 0565c993f9eff9 ("u_trace: helpers for tracing tiling GPUs and re-usable VK cmdbuffers")
    Reviewed-by: Danylo Piliaiev <dpiliaiev at igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13899>
    (cherry picked from commit 14e45cb21eaf253b571aa410de422cdc6f9bb647)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f0505d49efaf8cd0aee6894b41ff52c961358f8
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Tue Nov 23 13:27:14 2021 +0000

    spirv: run nir_copy_prop before nir_rematerialize_derefs_in_use_blocks_impl
    
    spirv_to_nir sometimes wraps derefs in vec2 or mov instructions as part of
    its texture handling. These get in the way of
    nir_rematerialize_derefs_in_use_blocks_impl. Running copy propagation
    should get rid of the extra move instructions and get us back to intact
    deref chains for everything except variable pointer use-cases.
    
    fossil-db (Sienna Cichlid):
    Totals from 6 (0.00% of 134572) affected shaders:
    CodeSize: 92656 -> 93088 (+0.47%)
    Instrs: 17060 -> 17138 (+0.46%)
    Latency: 224408 -> 227539 (+1.40%)
    InvThroughput: 37402 -> 37924 (+1.40%)
    VClause: 408 -> 402 (-1.47%)
    Copies: 1065 -> 1107 (+3.94%)
    
    Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5668
    Fixes: 14a12b771d0 ("spirv: Rework our handling of images and samplers")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13924>
    (cherry picked from commit b4251007810bc2a02d44580b04ad34ec381f891b)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a5cea0ff801515c0bf62e6e7f71bd1189d2db7d
Author: Thomas H.P. Andersen <phomes at gmail.com>
Date:   Sun Aug 1 12:52:56 2021 +0200

    svga: fix bitwise/logical and mixup
    
    The function need_temp_reg_initialization looks suspecious.
    
    It will only ever return true if we get past this if:
    if (!(emit->info.indirect_files && (1u << TGSI_FILE_TEMPORARY)) ...
    
    Using the logical && means the intended initialization done
    based on the result of this check is not performed.
    
    This code was both introduced and altered in MR 5317.
    ccb4ea5a introduces the function.
    ba37d408 is a collection of performance improvements and misc
    fixes. This altered the if from using bitwise to logical and.
    
    This commit changes it back to bitwise.
    
    Spotted from a compile warning.
    
    Fixes: ba37d408da3 ("svga: Performance fixes")
    
    Reviewed-by: Zoltán Böszörményi <zboszor at gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12157>
    (cherry picked from commit 64292c0f05ba891d9c7319e1a1cea98eb0630af4)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ba31a494d00ed6270b7fb71d3f1864925a02c57
Author: Roman Stratiienko <r.stratiienko at gmail.com>
Date:   Mon Nov 22 18:57:01 2021 +0200

    android.mk: Add missing variables to the make target
    
    Android build system may use different internal variables to specify
    cflags/cppflags.
    Small change in product confguration may force Android to use diffrent
    set of variables, therefore we should keep all of them attached to the
    make rule's target.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5549
    Fixes: 8621bd8d5e67 ("android: Add scripts to build using meson")
    Signed-off-by: Roman Stratiienko <r.stratiienko at gmail.com>
    Acked-by: Jesse Natalie <jenatali at microsoft.com>
    Reviewed-by: Marijn Suijten <marijn.suijten at somainline.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13914>
    (cherry picked from commit 32ec0fffa6fbe58b0fd76901c6a7dc8a9cfc79b1)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1d5657990065dabbe152714dcab12f4f49d0a15
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Thu Nov 18 10:44:21 2021 +0100

    radv: fix emitting VBO when vertex input dynamic state is used
    
    In the following scenario:
        CmdBindPipeline()
        CmdBindVertexBuffers()
        CmdSetVertexInput()
        CmdDraw()
        CmdBindVertexBuffers()
        CmdSetVertexInput()
        CmdDraw()
    
    The VBO won't be updated for the second draw because the state is
    cleared when the dynamic state is emitted and the pipeline isn't dirty.
    
    Found by inspection.
    
    Cc: 21.3 mesa-stable
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13855>
    (cherry picked from commit aee25471b9e83c10430d7ac5c7b80b1ae2d5ad17)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3defc6bc475c00540dc28d7578a12e6c0ab6b285
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Tue Nov 16 17:33:11 2021 +0000

    aco/spill: use spills_entry instead of spills_exit to kill linear VGPRs
    
    If a predecessor has only spilled constants (no temporaries), spills_exit
    will be empty.
    
    fossil-db (Sienna Cichlid):
    Totals from 2 (0.00% of 128647) affected shaders:
    Latency: 139106 -> 139104 (-0.00%)
    
    Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
    Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5633
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13821>
    (cherry picked from commit cc2894345f1161fcbb2f9b9150257e0f6b0b303e)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=73f5d5053e310850043c1641b8c14c1ae7516d83
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date:   Tue Jun 29 12:40:39 2021 +0300

    intel/fs: fix shader call lowering pass
    
    Now that we removed the intel intrinsic and just use the generic one,
    we can skip it in the intel call lowering pass and just deal with it
    in the intel rt intrinsic lowering.
    
    v2: rewrite with nir_shader_instructions_pass() (Jason)
    
    v3: handle everything in switch (Jason)
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Fixes: 423c47de991643 ("nir: drop the btd_resume_intel intrinsic")
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12113>
    (cherry picked from commit c5a42e401036eb2eecf8798c103f8ae2cce08eab)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3d950ce4adfa7f2504cd715f67f9c7a076d1dba
Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Tue Nov 16 15:20:52 2021 +0100

    ir3/lower_pcopy: Fix bug with "illegal" copies and swaps
    
    If the source and destination were within the same full register, like
    hr90.x and hr90.y (which both map to r45.x), then we'd perform the
    swap/copy with the wrong register. This broke
    dEQP-VK.ssbo.phys.layout.random.16bit.scalar.35 once BDA is enabled.
    
    Fixes: 0ffcb19b9d9 ("ir3: Rewrite register allocation")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13818>
    (cherry picked from commit c98adc56f4fe08231b0fec84b6a92c89eb94d59b)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6bdf7a811c507431c9dd178055c2168640564f3
Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Tue Nov 16 15:32:58 2021 +0100

    ir3/lower_pcopy: Fix shr.b illegal copy lowering
    
    The immediate shouldn't be half-reg because the other source isn't.
    Fixes an assertion failure with
    dEQP-VK.ssbo.phys.layout.random.16bit.scalar.35.
    
    Fixes: 0ffcb19b9d9 ("ir3: Rewrite register allocation")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13818>
    (cherry picked from commit 65da866ad96bbe5a1683c98191331827ea3bd580)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=11e8af19554310a8fffcbcd6219ed2d0d9de5ddd
Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Mon Nov 15 12:11:07 2021 +0100

    ir3/ra: Consider reg file size when swapping killed sources
    
    Don't swap a 2-component vector of half-regs with a full reg if that
    would result in the half regs going outside of the allowable half-reg
    space.
    
    Fixes: d4b5d2a0204 ("ir3/ra: Use killed sources in register eviction")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13818>
    (cherry picked from commit 9d88b98b0820198c0050965cbd6f1909b9eb8fa5)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5c31a44a872f5ac267663794e8e60e106eca130
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date:   Fri Nov 19 16:00:15 2021 +0200

    anv: don't try to close fd = -1
    
    CID: 1464334
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Cc: mesa-stable
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13879>
    (cherry picked from commit 04bd5bb69ba3f33b7e018620eae5e8b6a6da7734)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b2e5b6757a6faed55afef910db4d50e6d67bc09a
Author: Qiang Yu <yuq825 at gmail.com>
Date:   Fri Nov 12 14:42:54 2021 +0800

    glx/dri3: fix glXQueryContext does not return GLX_RENDER_TYPE value
    
    Cc: mesa-stable
    Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Reviewed-by: Adam Jackson <ajax at redhat.com>
    Signed-off-by: Qiang Yu <yuq825 at gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13772>
    (cherry picked from commit cee1dd92bd89374e27e1d431d42f0c469cc6e56e)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7bde2ce13fbc8220c683ee8373ced973f0da1bc7
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Nov 23 08:49:53 2021 +0100

    broadcom/compiler: don't move ldvary earlier if current instruction has ldunif
    
    If we did, we would have the instruction coming right after ldvary write
    to the same implicit destination as ldvary at the same time. We prevent
    this when merging instructions, but we should make sure we prevent this
    when we move ldvary around for pipelining too.
    
    Reviewed-by: Juan A. Suarez <jasuarez at igalia.com>
    (cherry picked from commit 79dee14cc218d87ea8a5020507161a363477f09a)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13923>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2d44f5979921b71d73b5c07c3fb8554fa6a485a
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon Nov 22 11:27:41 2021 +0100

    broadcom/compiler: fix scoreboard locking checks
    
    According to the spec the hardware locks the scoreboard on the first
    or last thread switch (selected via shader state) and any TLB accesses
    executed before this are not synchronized by hardware.
    
    This change updates the logic to ensure we respect this requirement
    and that we don't assume that the lock is acquired automatically
    on the first TLB access, which is not valid at least since V3D 4.1+.
    
    Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
    (cherry picked from commit 7fec4f4135210b83556004c6634d78d4ed33a525)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13923>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6504f64e853809bde997a761cca16a693512175
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon Nov 22 12:23:13 2021 +0100

    broadcom/compiler: don't allow RF writes from signals after thrend
    
    Writes to physical registers are not allowed after thread end. We
    were checking this for ALU writes, but we need to check it for
    signal writes too.
    
    Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
    (cherry picked from commit bd7584c16bc56fdcb3a7a720c9a857e158f699d2)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13923>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec1891bae899a673bbd5515878c23465f3bbca63
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Nov 16 11:08:15 2021 +0100

    radv: disable HTILE for D32S8 format and mipmaps on GFX10
    
    Stencil texturing with HTILE doesn't work with mipmapping on Navi10-14,
    it's a hw bug. RadeonSI and PAL have a workaround too.
    
    This fixes 35 piglit failures with Zink on Navi10.
    
    Cc: 21.3 mesa-stable
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13814>
    (cherry picked from commit 341278f069a54a173fa646b16e0b68eefd28e5ed)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e31954a2e529a867a584738b02411f0e56985cb
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Tue Nov 16 17:45:58 2021 -0500

    zink: fail context creation more gracefully
    
    handle some cases where context creation fails earlier than expected
    
    cc: mesa-stable
    
    Reviewed-by: Dave Airlie <airlied at redhat.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13844>
    (cherry picked from commit a3be30665f1f8bb140069728fd8e17ce6fcdbaa4)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2682955ff5456c88496fca7178331e473575469
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Wed Nov 17 16:48:28 2021 -0500

    zink: fix memory availability reporting
    
    this shouldn't report the budgeted available memory, it should return
    the total memory, as that's what this api expects
    
    Fixes: ff4ba3d4a77 ("zink: support PIPE_CAP_QUERY_MEMORY_INFO")
    
    Reviewed-by: Dave Airlie <airlied at redhat.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13849>
    (cherry picked from commit 72a88c77def2948e291427c963e2f4337bc059d4)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d130ac3ff51789075feea2a266f88b1028f24eb
Author: Iván Briano <ivan.briano at intel.com>
Date:   Wed Nov 17 11:02:26 2021 -0800

    intel/nir: also allow unknown format for getting the size of a storage image
    
    Fixes: fa251cf111df ("intel/nir: allow unknown format in lowering of storage images")
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13847>
    (cherry picked from commit 0388783a03e48b7efce984436a2b424c95761522)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=236be36989ada9f84545aa72a918c98f3089c6cf
Author: Ian Romanick <ian.d.romanick at intel.com>
Date:   Tue Nov 16 17:02:50 2021 -0800

    glsl/nir: Don't build soft float64 when it cannot be used
    
    Fixes: 82d9a37a59c ("glsl/nir: Add a shared helper for building float64 shaders")
    Closes: #5556
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13828>
    (cherry picked from commit 04f5c543ded15362dc6286ff4ae7a38f00f6ca7e)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a379268693a6889e3f4ac650907960b6e1c1fb0a
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Thu Nov 11 12:23:29 2021 -0500

    zink: always set matching resource export type for dmabuf creation
    
    both of these need to be set if one is
    
    cc: mesa-stable
    
    Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13799>
    (cherry picked from commit 943f6a038db868004d118db128564dd2e5c6e650)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c90e1f8c47838b9f6ac728f268ed5b1aaab39d8
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Thu Nov 11 12:11:33 2021 -0500

    zink: stop using VK_IMAGE_LAYOUT_PREINITIALIZED for dmabuf
    
    this is illegal
    
    cc: mesa-stable
    
    Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13799>
    (cherry picked from commit 11c79a8bd79178ab027438b018379051e33430c8)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=00638cea40b516a88a53d7df4706965f108276bf
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Nov 15 19:14:01 2021 -0800

    iris: Tidy code in iris_use_pinned_bo a bit
    
    Now that we aren't short-circuiting most of the code, we should probably
    reorganize it a little bit.  Tagged with fixes just so we pull all the
    refactors together as one group.
    
    Fixes: b21e916a628 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
    Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
    (cherry picked from commit 3b78f175323f1db5ae28da264d5761bebb4f7052)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b90272e16c8b590e8eb73c8b72240206fc08eb4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Nov 15 19:08:55 2021 -0800

    iris: Check for cross-batch flushing whenever a buffer is newly written.
    
    We need to perform cross-batch flushing if any batch writes to a BO
    while others refer to it.  We checked this case when recording a new
    BO in the list which we'd never seen before.  However, we neglected to
    handle the case when we already read from a BO, but then began writing
    to it.  That new write may provoke a conflict between existing reads
    in other batches, so we need to re-check the cross-batch flushing.
    
    Caught by Piglit's copyteximage when forcing blits and copies to use
    a new IRIS_BATCH_BLITTER that isn't upstream yet.  But this bug could
    be provoked by render/compute work today...we just hadn't noticed it.
    
    Fixes: b21e916a628 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
    Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
    (cherry picked from commit 6e909849349062985fe279296bfb0eb3c94b494c)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3dd8c974e30ebe5a8cfd412277525e1c6d4c7b2
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Nov 15 19:02:31 2021 -0800

    iris: Make a helper function for cross-batch dependency flushing
    
    This should have no functional change, but it's tagged with Fixes
    anyway because it's needed for the bug fix in the next patch.
    
    Fixes: b21e916a628 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
    Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
    (cherry picked from commit 76030964a65a527b30bb46f2ff806ddafdd3fc2d)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=39ad7f930a417e5a026631a7a86fa2a5023bf4fd
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Tue Nov 16 17:19:43 2021 -0500

    zink: set suballocator bo size to aligned allocation size
    
    this is the actual memory size
    
    cc: mesa-stable
    
    Reviewed-by: Dave Airlie <airlied at redhat.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13824>
    (cherry picked from commit 97b92c9c32a508b9aa85458661b762ffde1c590a)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a254750fbdbc326da7711a70c2921d32fe0c8600
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Tue Nov 16 16:27:59 2021 -0500

    zink: block suballocator caching for swapchain/dmabuf images
    
    these have pNext pointers which makes their memory uncacheable
    
    cc: mesa-stable
    
    Reviewed-by: Dave Airlie <airlied at redhat.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13824>
    (cherry picked from commit eb6f1d53482b83feb51dac0f0fffd4291b651848)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f4ebf9517f5d358b0a45c2fabb2353cf4661bff8
Author: Eric Engestrom <eric at engestrom.ch>
Date:   Thu Nov 18 19:01:10 2021 +0000

    .pick_status.json: Update to 1ba231fb75be5bffd806cbd09ac285d1f8f15e3d



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