Mesa (main): nouveau/nir: Use the address reg for indirect scratch access.

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: 4b5692fa7185b1380c51247583e08feba0b2c6eb
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b5692fa7185b1380c51247583e08feba0b2c6eb

Author: Emma Anholt <emma at anholt.net>
Date:   Sun Dec  5 11:41:25 2021 -0800

nouveau/nir: Use the address reg for indirect scratch access.

Fixes the dEQP regressions in dEQP-GLES2.functional.shaders.indexing.*.
TGSI used the address reg for these offsets too.

Reviewed-by: Karol Herbst <kherbst at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14083>

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index 1c8c1c43fba..e28c94f52ef 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
@@ -2301,6 +2301,8 @@ Converter::visit(nir_intrinsic_instr *insn)
       DataType sType = getSType(insn->src[0], false, false);
       Value *indirectOffset;
       uint32_t offset = getIndirect(&insn->src[1], 0, indirectOffset);
+      if (indirectOffset)
+         indirectOffset = mkOp1v(OP_MOV, TYPE_U32, getSSA(4, FILE_ADDRESS), indirectOffset);
 
       for (uint8_t i = 0u; i < nir_intrinsic_src_components(insn, 0); ++i) {
          if (!((1u << i) & nir_intrinsic_write_mask(insn)))
@@ -2317,6 +2319,8 @@ Converter::visit(nir_intrinsic_instr *insn)
       LValues &newDefs = convert(&insn->dest);
       Value *indirectOffset;
       uint32_t offset = getIndirect(&insn->src[0], 0, indirectOffset);
+      if (indirectOffset)
+         indirectOffset = mkOp1v(OP_MOV, TYPE_U32, getSSA(4, FILE_ADDRESS), indirectOffset);
 
       for (uint8_t i = 0u; i < dest_components; ++i)
          loadFrom(getFile(op), 0, dType, newDefs[i], offset, i, indirectOffset);