Mesa (main): nir_to_tgsi: Make !native_integers front face input match glsl_to_tgsi.

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Fri Dec 10 13:56:25 UTC 2021


Module: Mesa
Branch: main
Commit: 495a4cfbc3fa2ea578fe512bfc6e03e72d238a71
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=495a4cfbc3fa2ea578fe512bfc6e03e72d238a71

Author: Emma Anholt <emma at anholt.net>
Date:   Tue Dec  7 15:12:14 2021 -0800

nir_to_tgsi: Make !native_integers front face input match glsl_to_tgsi.

Avoids regression on r300, which has 0.0 vs 1.0 frontface despite what
tgsi.rst says.

Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14096>

---

 src/gallium/auxiliary/nir/nir_to_tgsi.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.c b/src/gallium/auxiliary/nir/nir_to_tgsi.c
index e8ae4017288..69ff5401bc2 100644
--- a/src/gallium/auxiliary/nir/nir_to_tgsi.c
+++ b/src/gallium/auxiliary/nir/nir_to_tgsi.c
@@ -374,8 +374,21 @@ ntt_setup_inputs(struct ntt_compile *c)
 
       if (semantic_name == TGSI_SEMANTIC_FACE) {
          struct ureg_dst temp = ureg_DECL_temporary(c->ureg);
-         /* NIR is ~0 front and 0 back, while TGSI is +1 front */
-         ureg_SGE(c->ureg, temp, decl, ureg_imm1f(c->ureg, 0));
+         if (c->native_integers) {
+            /* NIR is ~0 front and 0 back, while TGSI is +1 front */
+            ureg_SGE(c->ureg, temp, decl, ureg_imm1f(c->ureg, 0));
+         } else {
+            /* tgsi docs say that floating point FACE will be positive for
+             * frontface and negative for backface, but realistically
+             * GLSL-to-TGSI had been doing MOV_SAT to turn it into 0.0 vs 1.0.
+             * Copy that behavior, since some drivers (r300) have been doing a
+             * 0.0 vs 1.0 backface (and I don't think anybody has a non-1.0
+             * front face).
+             */
+            temp.Saturate = true;
+            ureg_MOV(c->ureg, temp, decl);
+
+         }
          decl = ureg_src(temp);
       }
 



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