Mesa (main): iris: Update the initial CCS state on XeHP

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: 5197809302b183572a2b8380378dd266951e7726
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5197809302b183572a2b8380378dd266951e7726

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Fri Aug  6 15:37:21 2021 -0700

iris: Update the initial CCS state on XeHP

We can't map the CCS on this platform to initialize it into the
PASS_THROUGH state. This can cause issues with optimizations in the
driver that rely on this state.

For example, after rendering to a surface with AUX_NONE, we can then
render to it with AUX_CCS_E without an ambiguate in between (if the CCS
in the PASS_THROUGH state). If that state was incorrect and the aux was
actually compressed, there can be rendering corruption because the
contents may be misinterpreted on the second render.

Use a more accurate initial aux state to avoid these issues.

One notable change in behavior here is that aux surfaces can be created
with fast-cleared blocks even though the caller may specify a modifier
that doesn't support fast clears. This should be fine, so long as all HW
units that can access these surfaces can handle that bit-pattern. We
haven't seen an applicable restriction yet.

Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13555>

---

 src/gallium/drivers/iris/iris_resource.c | 36 +++++++++++++++++++++++---------
 1 file changed, 26 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index a1845ec519c..a93d3db5d60 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -831,21 +831,37 @@ iris_resource_configure_aux(struct iris_screen *screen,
    case ISL_AUX_USAGE_GFX12_CCS_E:
    case ISL_AUX_USAGE_STC_CCS:
    case ISL_AUX_USAGE_MC:
-      /* When CCS is used, we need to ensure that it starts off in a valid
-       * state. From the Sky Lake PRM, "MCS Buffer for Render Target(s)":
-       *
-       *    "If Software wants to enable Color Compression without Fast
-       *     clear, Software needs to initialize MCS with zeros."
-       *
-       * A CCS surface initialized to zero is in the pass-through state. This
-       * state can avoid the need to ambiguate in some cases. We'll map and
-       * zero the CCS later on in iris_resource_init_aux_buf.
-       */
       if (imported) {
          assert(res->aux.usage != ISL_AUX_USAGE_STC_CCS);
          initial_state =
             isl_drm_modifier_get_default_aux_state(res->mod_info->modifier);
+      } else if (devinfo->verx10 >= 125) {
+         assert(res->aux.surf.size_B == 0);
+         /* From Bspec 47709, "MCS/CCS Buffers for Render Target(s)":
+          *
+          *    "CCS surface does not require initialization. Illegal CCS
+          *     [values] are treated as uncompressed memory."
+          *
+          * Even if we wanted to, we can't initialize the CCS via CPU map. So,
+          * we choose an aux state which describes the current state and helps
+          * avoid ambiguating (something not currently supported for STC_CCS).
+          */
+         assert(isl_aux_usage_has_compression(res->aux.usage));
+         initial_state = isl_aux_usage_has_fast_clears(res->aux.usage) ?
+                         ISL_AUX_STATE_COMPRESSED_CLEAR :
+                         ISL_AUX_STATE_COMPRESSED_NO_CLEAR;
       } else {
+         assert(res->aux.surf.size_B > 0);
+         /* When CCS is used, we need to ensure that it starts off in a valid
+          * state. From the Sky Lake PRM, "MCS Buffer for Render Target(s)":
+          *
+          *    "If Software wants to enable Color Compression without Fast
+          *     clear, Software needs to initialize MCS with zeros."
+          *
+          * A CCS surface initialized to zero is in the pass-through state.
+          * This state can avoid the need to ambiguate in some cases. We'll
+          * map and zero the CCS later on in iris_resource_init_aux_buf.
+          */
          initial_state = ISL_AUX_STATE_PASS_THROUGH;
       }
       break;