Mesa (main): radeonsi: add shader profiles that disable binning

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Module: Mesa
Branch: main
Commit: af9ec3c45daff3186571304c6c7c3ac6b6c5b4ff
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=af9ec3c45daff3186571304c6c7c3ac6b6c5b4ff

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sat Nov 27 11:39:23 2021 -0500

radeonsi: add shader profiles that disable binning

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13966>

---

 src/gallium/drivers/radeonsi/si_pipe.h            |  2 ++
 src/gallium/drivers/radeonsi/si_shader.h          |  2 ++
 src/gallium/drivers/radeonsi/si_shader_nir.c      | 10 ++++++++++
 src/gallium/drivers/radeonsi/si_state_binning.c   |  3 ++-
 src/gallium/drivers/radeonsi/si_state_shaders.cpp | 18 ++++++++++++++++++
 5 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index b0db57599f0..78117536afd 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1182,6 +1182,8 @@ struct si_context {
    bool need_check_render_feedback;
    bool decompression_enabled;
    bool dpbb_force_off;
+   bool dpbb_force_off_profile_vs;
+   bool dpbb_force_off_profile_ps;
    bool vs_writes_viewport_index;
    bool vs_disables_clipping_viewport;
 
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index b740e2ba6e6..4fb01cb82dc 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -291,6 +291,8 @@ enum
 #define SI_PROFILE_WAVE32                    (1 << 0)
 #define SI_PROFILE_WAVE64                    (1 << 1)
 #define SI_PROFILE_IGNORE_LLVM_DISCARD_BUG   (1 << 2)
+#define SI_PROFILE_VS_NO_BINNING             (1 << 3)
+#define SI_PROFILE_PS_NO_BINNING             (1 << 4)
 
 /**
  * For VS shader keys, describe any fixups required for vertex fetch.
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index b43b5359da8..f51909cf079 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -41,11 +41,21 @@ struct si_shader_profile {
 
 static struct si_shader_profile profiles[] =
 {
+   {
+      /* Plot3D */
+      {0x485320cd, 0x87a9ba05, 0x24a60e4f, 0x25aa19f7, 0xf5287451},
+      SI_PROFILE_VS_NO_BINNING,
+   },
    {
       /* Viewperf/Energy isn't affected by the discard bug. */
       {0x17118671, 0xd0102e0c, 0x947f3592, 0xb2057e7b, 0x4da5d9b0},
       SI_PROFILE_IGNORE_LLVM_DISCARD_BUG,
    },
+   {
+      /* Viewperf/Medical */
+      {0x4dce4331, 0x38f778d5, 0x1b75a717, 0x3e454fb9, 0xeb1527f0},
+      SI_PROFILE_PS_NO_BINNING,
+   },
    {
       /* Viewperf/Medical, a shader with a divergent loop doesn't benefit from Wave32,
        * probably due to interpolation performance.
diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index 20ae1fabc5f..6ea4b56ebda 100644
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -449,7 +449,8 @@ void si_emit_dpbb_state(struct si_context *sctx)
 
    assert(sctx->chip_class >= GFX9);
 
-   if (!sscreen->dpbb_allowed || sctx->dpbb_force_off) {
+   if (!sscreen->dpbb_allowed || sctx->dpbb_force_off ||
+       sctx->dpbb_force_off_profile_vs || sctx->dpbb_force_off_profile_ps) {
       si_emit_dpbb_disable(sctx);
       return;
    }
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
index 6bd67a82c03..c32a014270b 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
@@ -3336,6 +3336,15 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
                        si_get_vs(sctx)->current);
    si_update_rasterized_prim(sctx);
    si_vs_key_update_inputs(sctx);
+
+   if (sctx->screen->dpbb_allowed) {
+      bool force_off = sel && sel->info.options & SI_PROFILE_VS_NO_BINNING;
+
+      if (force_off != sctx->dpbb_force_off_profile_vs) {
+         sctx->dpbb_force_off_profile_vs = force_off;
+         si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
+      }
+   }
 }
 
 static void si_update_tess_uses_prim_id(struct si_context *sctx)
@@ -3555,6 +3564,15 @@ static void si_bind_ps_shader(struct pipe_context *ctx, void *state)
    si_update_ps_inputs_read_or_disabled(sctx);
    si_update_ps_kill_enable(sctx);
    si_update_vrs_flat_shading(sctx);
+
+   if (sctx->screen->dpbb_allowed) {
+      bool force_off = sel && sel->info.options & SI_PROFILE_PS_NO_BINNING;
+
+      if (force_off != sctx->dpbb_force_off_profile_ps) {
+         sctx->dpbb_force_off_profile_ps = force_off;
+         si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
+      }
+   }
 }
 
 static void si_delete_shader(struct si_context *sctx, struct si_shader *shader)