Mesa (main): nir/print: group hex and float vectors together
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Fri Dec 17 10:40:06 UTC 2021
Module: Mesa
Branch: main
Commit: 23f8f836e0eadcb4a38fae28d1c96643663753c1
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=23f8f836e0eadcb4a38fae28d1c96643663753c1
Author: Marcin Ślusarz <marcin.slusarz at intel.com>
Date: Fri Nov 19 15:35:37 2021 +0100
nir/print: group hex and float vectors together
Vectors are much easier to follow in this format, because developer cares
either about hex or float values, never both.
Before/after:
-vec4 32 ssa_222 = load_const (0x00000000 /* 0.000000 */, 0x00000000 /* 0.000000 */, 0x3f800000 /* 1.000000 */, 0x3f800000 /* 1.000000 */)
+vec4 32 ssa_222 = load_const (0x00000000, 0x00000000, 0x3f800000, 0x3f800000) = (0.000000, 0.000000, 1.000000, 1.000000)
-vec1 32 ssa_174 = load_const (0xbf800000 /* -1.000000 */)
+vec1 32 ssa_174 = load_const (0xbf800000 = -1.000000)
Reviewed-by: Emma Anholt <emma at anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13880>
---
src/compiler/nir/nir_print.c | 46 +++++++++++++++++++++++++++++++++-----------
1 file changed, 35 insertions(+), 11 deletions(-)
diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c
index 1573b606e52..f06ea2a8141 100644
--- a/src/compiler/nir/nir_print.c
+++ b/src/compiler/nir/nir_print.c
@@ -119,27 +119,25 @@ print_load_const_instr(nir_load_const_instr *instr, print_state *state)
fprintf(fp, " = load_const (");
+ /*
+ * we don't really know the type of the constant (if it will be used as a
+ * float or an int), so just print the raw constant in hex for fidelity
+ * and then print in float again for readability.
+ */
+
for (unsigned i = 0; i < instr->def.num_components; i++) {
if (i != 0)
fprintf(fp, ", ");
- /*
- * we don't really know the type of the constant (if it will be used as a
- * float or an int), so just print the raw constant in hex for fidelity
- * and then print the float in a comment for readability.
- */
-
switch (instr->def.bit_size) {
case 64:
- fprintf(fp, "0x%016" PRIx64 " /* %f */", instr->value[i].u64,
- instr->value[i].f64);
+ fprintf(fp, "0x%016" PRIx64, instr->value[i].u64);
break;
case 32:
- fprintf(fp, "0x%08x /* %f */", instr->value[i].u32, instr->value[i].f32);
+ fprintf(fp, "0x%08x", instr->value[i].u32);
break;
case 16:
- fprintf(fp, "0x%04x /* %f */", instr->value[i].u16,
- _mesa_half_to_float(instr->value[i].u16));
+ fprintf(fp, "0x%04x", instr->value[i].u16);
break;
case 8:
fprintf(fp, "0x%02x", instr->value[i].u8);
@@ -150,6 +148,32 @@ print_load_const_instr(nir_load_const_instr *instr, print_state *state)
}
}
+ if (instr->def.bit_size > 8) {
+ if (instr->def.num_components > 1)
+ fprintf(fp, ") = (");
+ else
+ fprintf(fp, " = ");
+
+ for (unsigned i = 0; i < instr->def.num_components; i++) {
+ if (i != 0)
+ fprintf(fp, ", ");
+
+ switch (instr->def.bit_size) {
+ case 64:
+ fprintf(fp, "%f", instr->value[i].f64);
+ break;
+ case 32:
+ fprintf(fp, "%f", instr->value[i].f32);
+ break;
+ case 16:
+ fprintf(fp, "%f", _mesa_half_to_float(instr->value[i].u16));
+ break;
+ default:
+ unreachable("unhandled bit size");
+ }
+ }
+ }
+
fprintf(fp, ")");
}
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