Mesa (main): intel/eu: Don't double-loop as often in brw_set_uip_jip

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Sat Dec 18 02:05:02 UTC 2021


Module: Mesa
Branch: main
Commit: e6f0def97df3f83823bd1300e334ce48b23be005
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6f0def97df3f83823bd1300e334ce48b23be005

Author: Jason Ekstrand <jason at jlekstrand.net>
Date:   Tue Nov  9 16:09:23 2021 -0600

intel/eu: Don't double-loop as often in brw_set_uip_jip

brw_find_next_block_end() scans through the instructions to find the end
of the block.  We were calling it for every instruction in the program
which is, if you have a single basic block, makes the whole mess a nice
clean O(n^2) when it really doesn't need to be.  Instead, only call
brw_find_next_block_end() as-needed.  This brings it back to O(n) like
it should have been.

This cuts the runtime of the following Vulkan CTS on my SKL box by 5%
from 1:51 to 1:45:  dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13

Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Emma Anholt <emma at anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13734>

---

 src/intel/compiler/brw_eu_emit.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 1cb01367d4f..32cfae00093 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -2992,9 +2992,9 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset)
       brw_inst *insn = store + offset;
       assert(brw_inst_cmpt_control(devinfo, insn) == 0);
 
-      int block_end_offset = brw_find_next_block_end(p, offset);
       switch (brw_inst_opcode(devinfo, insn)) {
-      case BRW_OPCODE_BREAK:
+      case BRW_OPCODE_BREAK: {
+         int block_end_offset = brw_find_next_block_end(p, offset);
          assert(block_end_offset != 0);
          brw_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale);
 	 /* Gfx7 UIP points to WHILE; Gfx6 points just after it */
@@ -3002,7 +3002,10 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset)
 	    (brw_find_loop_end(p, offset) - offset +
              (devinfo->ver == 6 ? 16 : 0)) / scale);
 	 break;
-      case BRW_OPCODE_CONTINUE:
+      }
+
+      case BRW_OPCODE_CONTINUE: {
+         int block_end_offset = brw_find_next_block_end(p, offset);
          assert(block_end_offset != 0);
          brw_inst_set_jip(devinfo, insn, (block_end_offset - offset) / scale);
          brw_inst_set_uip(devinfo, insn,
@@ -3011,8 +3014,10 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset)
          assert(brw_inst_uip(devinfo, insn) != 0);
          assert(brw_inst_jip(devinfo, insn) != 0);
 	 break;
+      }
 
       case BRW_OPCODE_ENDIF: {
+         int block_end_offset = brw_find_next_block_end(p, offset);
          int32_t jump = (block_end_offset == 0) ?
                         1 * br : (block_end_offset - offset) / scale;
          if (devinfo->ver >= 7)
@@ -3022,7 +3027,7 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset)
 	 break;
       }
 
-      case BRW_OPCODE_HALT:
+      case BRW_OPCODE_HALT: {
 	 /* From the Sandy Bridge PRM (volume 4, part 2, section 8.3.19):
 	  *
 	  *    "In case of the halt instruction not inside any conditional
@@ -3034,6 +3039,7 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset)
 	  * The uip will have already been set by whoever set up the
 	  * instruction.
 	  */
+         int block_end_offset = brw_find_next_block_end(p, offset);
 	 if (block_end_offset == 0) {
             brw_inst_set_jip(devinfo, insn, brw_inst_uip(devinfo, insn));
 	 } else {
@@ -3042,6 +3048,7 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset)
          assert(brw_inst_uip(devinfo, insn) != 0);
          assert(brw_inst_jip(devinfo, insn) != 0);
 	 break;
+      }
 
       default:
          break;



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