Mesa (main): intel/compiler: remove gfx6 gather wa from backend.

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Dec 22 22:00:02 UTC 2021


Module: Mesa
Branch: main
Commit: e12b0d0d60f0bc9926d53cdbdb7d62cc5cdde1d8
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e12b0d0d60f0bc9926d53cdbdb7d62cc5cdde1d8

Author: Dave Airlie <airlied at redhat.com>
Date:   Wed Dec 15 10:21:46 2021 +1000

intel/compiler: remove gfx6 gather wa from backend.

Crocus lowers this in the frontend, they key member is still used
but reset prior to backend.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14202>

---

 src/intel/compiler/brw_fs.h           |  1 -
 src/intel/compiler/brw_fs_nir.cpp     |  3 ---
 src/intel/compiler/brw_fs_visitor.cpp | 30 ------------------------------
 src/intel/compiler/brw_vec4.h         |  1 -
 src/intel/compiler/brw_vec4_nir.cpp   | 31 -------------------------------
 5 files changed, 66 deletions(-)

diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index fe22fca12db..f4107e18321 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -212,7 +212,6 @@ public:
    fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
                          const fs_reg &texture,
                          const fs_reg &texture_handle);
-   void emit_gfx6_gather_wa(uint8_t wa, fs_reg dst);
    fs_reg resolve_source_modifiers(const fs_reg &src);
    void emit_fsign(const class brw::fs_builder &, const nir_alu_instr *instr,
                    fs_reg result, fs_reg *op, unsigned fsign_src);
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 6b87bf92af1..994286baaab 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -6282,9 +6282,6 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
    if (srcs[TEX_LOGICAL_SRC_SHADOW_C].file != BAD_FILE)
       inst->shadow_compare = true;
 
-   if (instr->op == nir_texop_tg4 && devinfo->ver == 6)
-      emit_gfx6_gather_wa(key_tex->gfx6_gather_wa[texture], dst);
-
    fs_reg nir_dest[5];
    for (unsigned i = 0; i < dest_size; i++)
       nir_dest[i] = offset(dst, bld, i);
diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp
index c06c150d074..9405eec6871 100644
--- a/src/intel/compiler/brw_fs_visitor.cpp
+++ b/src/intel/compiler/brw_fs_visitor.cpp
@@ -59,36 +59,6 @@ fs_visitor::emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
    return dest;
 }
 
-/**
- * Apply workarounds for Gfx6 gather with UINT/SINT
- */
-void
-fs_visitor::emit_gfx6_gather_wa(uint8_t wa, fs_reg dst)
-{
-   if (!wa)
-      return;
-
-   int width = (wa & WA_8BIT) ? 8 : 16;
-
-   for (int i = 0; i < 4; i++) {
-      fs_reg dst_f = retype(dst, BRW_REGISTER_TYPE_F);
-      /* Convert from UNORM to UINT */
-      bld.MUL(dst_f, dst_f, brw_imm_f((1 << width) - 1));
-      bld.MOV(dst, dst_f);
-
-      if (wa & WA_SIGN) {
-         /* Reinterpret the UINT value as a signed INT value by
-          * shifting the sign bit into place, then shifting back
-          * preserving sign.
-          */
-         bld.SHL(dst, dst, brw_imm_d(32 - width));
-         bld.ASR(dst, dst, brw_imm_d(32 - width));
-      }
-
-      dst = offset(dst, bld, 1);
-   }
-}
-
 /** Emits a dummy fragment shader consisting of magenta for bringup purposes. */
 void
 fs_visitor::emit_dummy_fs()
diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h
index 79a52b8b34a..d0b8b269b06 100644
--- a/src/intel/compiler/brw_vec4.h
+++ b/src/intel/compiler/brw_vec4.h
@@ -256,7 +256,6 @@ public:
 
    src_reg emit_mcs_fetch(const glsl_type *coordinate_type, src_reg coordinate,
                           src_reg surface);
-   void emit_gfx6_gather_wa(uint8_t wa, dst_reg dst);
 
    void emit_ndc_computation();
    void emit_psiz_and_flags(dst_reg reg);
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index c77176a7ebd..347c3d3bbe3 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -2278,10 +2278,6 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
                   src_reg(inst->dst), brw_imm_d(1));
    }
 
-   if (devinfo->ver == 6 && instr->op == nir_texop_tg4) {
-      emit_gfx6_gather_wa(key_tex->gfx6_gather_wa[texture], inst->dst);
-   }
-
    if (instr->op == nir_texop_query_levels) {
       /* # levels is in .w */
       src_reg swizzled(dest);
@@ -2319,33 +2315,6 @@ vec4_visitor::emit_mcs_fetch(const glsl_type *coordinate_type,
    return src_reg(inst->dst);
 }
 
-/**
- * Apply workarounds for Gfx6 gather with UINT/SINT
- */
-void
-vec4_visitor::emit_gfx6_gather_wa(uint8_t wa, dst_reg dst)
-{
-   if (!wa)
-      return;
-
-   int width = (wa & WA_8BIT) ? 8 : 16;
-   dst_reg dst_f = dst;
-   dst_f.type = BRW_REGISTER_TYPE_F;
-
-   /* Convert from UNORM to UINT */
-   emit(MUL(dst_f, src_reg(dst_f), brw_imm_f((float)((1 << width) - 1))));
-   emit(MOV(dst, src_reg(dst_f)));
-
-   if (wa & WA_SIGN) {
-      /* Reinterpret the UINT value as a signed INT value by
-       * shifting the sign bit into place, then shifting back
-       * preserving sign.
-       */
-      emit(SHL(dst, src_reg(dst), brw_imm_d(32 - width)));
-      emit(ASR(dst, src_reg(dst), brw_imm_d(32 - width)));
-   }
-}
-
 void
 vec4_visitor::nir_emit_undef(nir_ssa_undef_instr *instr)
 {



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