Mesa (master): zink: only emit SpvCapabilityDerivativeControl when needed

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Module: Mesa
Branch: master
Commit: b6da248c0edf86dc5b02dab12ca5f34da31c7ea0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6da248c0edf86dc5b02dab12ca5f34da31c7ea0

Author: Erik Faye-Lund <erik.faye-lund at collabora.com>
Date:   Tue Feb  2 12:24:33 2021 +0100

zink: only emit SpvCapabilityDerivativeControl when needed

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8832>

---

 src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index d68314ef387..3c739f34137 100644
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -1519,6 +1519,21 @@ get_dest_type(struct ntv_context *ctx, nir_dest *dest, nir_alu_type type)
    }
 }
 
+static bool
+needs_derivative_control(nir_alu_instr *alu)
+{
+   switch (alu->op) {
+   case nir_op_fddx_coarse:
+   case nir_op_fddx_fine:
+   case nir_op_fddy_coarse:
+   case nir_op_fddy_fine:
+      return true;
+
+   default:
+      return false;
+   }
+}
+
 static void
 emit_alu(struct ntv_context *ctx, nir_alu_instr *alu)
 {
@@ -1534,6 +1549,9 @@ emit_alu(struct ntv_context *ctx, nir_alu_instr *alu)
    unsigned bit_size = nir_dest_bit_size(alu->dest.dest);
    unsigned num_components = nir_dest_num_components(alu->dest.dest);
 
+   if (needs_derivative_control(alu))
+      spirv_builder_emit_cap(&ctx->builder, SpvCapabilityDerivativeControl);
+
    SpvId result = 0;
    switch (alu->op) {
    case nir_op_mov:
@@ -3326,7 +3344,6 @@ nir_to_spirv(struct nir_shader *s, const struct zink_so_info *so_info,
 
    // TODO: only enable when needed
    if (s->info.stage == MESA_SHADER_FRAGMENT) {
-      spirv_builder_emit_cap(&ctx.builder, SpvCapabilityDerivativeControl);
       spirv_builder_emit_cap(&ctx.builder, SpvCapabilitySampleRateShading);
    }
    if (s->info.stage == MESA_SHADER_FRAGMENT || s->info.num_images) {