Mesa (master): radv: Disable displayable DCC for GFX8 properly.

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Module: Mesa
Branch: master
Commit: d7e1f492bc44803b933687ce02765ceb4d2a7ef3
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7e1f492bc44803b933687ce02765ceb4d2a7ef3

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Tue Feb 23 17:27:53 2021 +0100

radv: Disable displayable DCC for GFX8 properly.

On scanout the GFX8 ac_surface doesn't clear the size but only
doesn't allocate space and hence dcc_offset is 0. This is the same
as radeonsi.

Fixes: 7acb30de8ac ("radv: Enable displayable DCC.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4346
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9221>

---

 src/amd/vulkan/radv_private.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index a2d8b19fd71..9b759c18f66 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1948,7 +1948,7 @@ radv_image_has_fmask(const struct radv_image *image)
 static inline bool
 radv_image_has_dcc(const struct radv_image *image)
 {
-	return image->planes[0].surface.dcc_size;
+	return image->planes[0].surface.dcc_offset;
 }
 
 /**