Mesa (staging/20.3): 67 new commits
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Tue Feb 23 22:23:51 UTC 2021
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=09f3a1f724218e5955e20198b22d021baeb1e12f
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Mon Feb 22 18:41:24 2021 +0200
anv: Fix wait_count missing increment
If we don't wait on anything, I bet it makes the QueuePresent faster,
but also completely wrong...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 02f94c33066eff ("anv: don't wait for completion of work on vkQueuePresent()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4276
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9211>
(cherry picked from commit b0b1bf9957380ad967e900b40027668353b71df6)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=73e1f3a3dd10e4fd25cdf93423d1b349a26e58e6
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Mon Feb 22 15:05:32 2021 +0000
aco/lower_phis: fix all_preds_uniform with continue_or_break
Found in a Death Stranding shader with loop unrolling disabled.
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Fixes: 9a089baff1a ("aco: optimize boolean phis with uniform selections")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9193>
(cherry picked from commit 75c9adf0398014b21ed9bbbd36f741b02b8f87f7)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac1880edc595e91216d543ccdbb7490fba84cce4
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Mon Feb 22 18:41:24 2021 +0200
anv: don't wait for completion of work on vkQueuePresent()
Another mistake which is that we don't use the right wait API.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 829699ba632b2b ("anv: implement shareable timeline semaphores")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4276
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9188>
(cherry picked from commit 02f94c33066eff9e5de2077230affab1a1f3d063)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab3f1b8eb5174418a7ae961d8240017e9039f583
Author: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
Date: Sat Jan 30 13:10:12 2021 -0800
Adjust dylib compatibility versions to match what was set by mesa-18.3's autotools-based builds
Cc: 20.3 21.0 <mesa-stable at lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4113
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu at apple.com>
Reviewed-by: Dylan Baker <dylan.c.baker at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8796>
(cherry picked from commit 38ae84b8daa1c2bc2f74093cf46ced5e252b04e5)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=421b5d62e126665a4175766a1e4a3b89af1041c3
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Feb 22 15:57:01 2021 +1000
glx: proposed fix for setSwapInterval
When mesa gets a DRI2 1.1 connection (as experienced with
vmwware DDX) we don't get a pointer for this.
Don't explode just keep going.
Fixes: 60ebeb4608a8 ("glx: Implement GLX_EXT_swap_control for DRI2 and DRI3")
Reviewed-by: Adam Jackson <ajaX at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9184>
(cherry picked from commit 279d1705525026c15e7cae88f8fa752046db1c19)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2447e82b0a1b0fcc263ce086a34db6e4beef29b7
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Fri Feb 19 15:58:16 2021 -0500
panfrost: Don't advertise OES_copy_image
We don't support it yet.
Fixes: 61d3ae6e0bd ("panfrost: Initial stub for Panfrost driver")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9164>
(cherry picked from commit 5eff64e3a318f911326499e9940ee773f6f58c21)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a467b33bfb03683ce2f8256cb24473db101e1a4
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Mon Jan 11 15:20:40 2021 +0100
vulkan/device_select: Stop using device properties 2.
We have to choose between:
1) Stop handling two identical GPUs
2) Stop having crashes with other layers active.
3) Fix the Vulkan Loader.
Since nobody seems to want to spend enough effort to do 3 the
effective choice is between 1 and 2. This is choosing 2, as
two identical GPUs is pretty uncommon since crossfire doesn't
work on Linux anyway.
(And it would only work sporadically as the game needs to enable the
extension)
CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3801
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8414>
(cherry picked from commit 38ce8d4d00c2b0e567b6dd36876cf171acb1dbc7)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=890bde0e04d47f0ca409b1dfbcda5cc1e4716735
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Sun Feb 21 21:01:04 2021 +0100
radv: Don't use dedicated memory info to indicate sharing.
Can be used without sharing, so if only the dedicated memory info
is set we know it isn't shareable. Use that.
Fixes: a639d40f133 ("radv: add support for local bos. (v3)")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4330
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9176>
(cherry picked from commit 2d520b692354ded47dbc32d19c2be253727bc935)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0f4bac7dc44c889f3a648690da05903b8d2cc65
Author: Vinson Lee <vlee at freedesktop.org>
Date: Sat Feb 13 20:21:55 2021 -0800
aco: Initialize ds_state.front.writeMask.
Fix defect reported by Coverity Scan.
Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value ds_state.front. Field ds_state.front.writeMask is uninitialized.
Fixes: d488d0fd7ba ("aco: add framework for testing isel and integration tests")
Signed-off-by: Vinson Lee <vlee at freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9033>
(cherry picked from commit 7cc83f237efe1fdba075d07b18450c4345d2dc7f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8921a493bf95bd002b603191a82b7f1df87c574
Author: Erico Nunes <nunes.erico at gmail.com>
Date: Sat Feb 20 14:24:09 2021 +0100
lima: fix max sampler views
If this is not defined, mesa may not deallocate sampler views,
which can result in memory leaks.
Just define it to the same as max texture samplers, like other
mesa drivers do.
Cc: mesa-stable
Signed-off-by: Erico Nunes <nunes.erico at gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9172>
(cherry picked from commit f3d47ba0c7596415b896297378ae5de0c4f30359)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=49f6978adcffbe5d45284f7d111d4dc0fdcc8681
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Tue Jan 12 12:23:16 2021 -0800
nir/algebraic: Fix some min/max of b2f replacements
fmin(-A, -B) is -fmax(A, B), and fmax(-A, -B) is -fmin(A, B). Therefore
the logic joining A and B should toggle between ior and iand for the
negated versions.
At the very least, a shader from Euro Truck Simulator 2 in shader-db is
affected by this. The KIL instruction in the (ARB assembly) shader ends
up with the wrong logic. This is _probably_ the source of
https://gitlab.freedesktop.org/mesa/mesa/-/issues/1346.
That said, the issue mentions that Mesa 18.0.5 works, but commit
68420d8322c ("nir: Simplify min and max of b2f") was added in 17.3.
Moreover, I was not able to reproduce the error in the ETS2 shader from
shader-db from any Mesa commit near the time the original fd.o bugzilla
was submitted (December 2018). :shrug:
In fact, the current error in that shader starts with 9167324a86b
("nir/algebraic: Mark some logic-joined comparison reductions as
exact"). That's a bit of a red herring as 9167324a86b just sets off a
chain of replacements that eventually leads to the incorrect min/max of
b2f patterns fixed by this commit.
The other affected shaders in the shader-db results are from Cargo
Commander. These are also ARB assembly shaders.
I think any ARB assembly shader that uses the pattern
SLT r0, ...;
...
KIL -r0;
will suffer from issues related to this.
This change fixes the piglit
tests/spec/arb_fragment_program/kil-of-slt.shader_test test added in
https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/454.
shader-db results:
All Gen6+ platforms had similar result. (Ice Lake shown)
total instructions in shared programs: 20034604 -> 20034486 (<.01%)
instructions in affected programs: 3885 -> 3767 (-3.04%)
helped: 47
HURT: 2
helped stats (abs) min: 2 max: 4 x̄: 2.64 x̃: 2
helped stats (rel) min: 2.33% max: 8.33% x̄: 3.48% x̃: 3.39%
HURT stats (abs) min: 3 max: 3 x̄: 3.00 x̃: 3
HURT stats (rel) min: 13.64% max: 16.67% x̄: 15.15% x̃: 15.15%
95% mean confidence interval for instructions value: -2.83 -1.99
95% mean confidence interval for instructions %-change: -3.84% -1.60%
Instructions are helped.
total cycles in shared programs: 979881379 -> 979879406 (<.01%)
cycles in affected programs: 119873 -> 117900 (-1.65%)
helped: 46
HURT: 3
helped stats (abs) min: 10 max: 756 x̄: 45.41 x̃: 26
helped stats (rel) min: 0.53% max: 19.72% x̄: 1.67% x̃: 1.26%
HURT stats (abs) min: 28 max: 56 x̄: 38.67 x̃: 32
HURT stats (rel) min: 1.44% max: 3.54% x̄: 2.75% x̃: 3.27%
95% mean confidence interval for cycles value: -70.83 -9.70
95% mean confidence interval for cycles %-change: -2.23% -0.57%
Cycles are helped.
Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8115098 -> 8115076 (<.01%)
instructions in affected programs: 2592 -> 2570 (-0.85%)
helped: 32
HURT: 2
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.88% max: 2.70% x̄: 1.35% x̃: 1.31%
HURT stats (abs) min: 5 max: 5 x̄: 5.00 x̃: 5
HURT stats (rel) min: 17.24% max: 18.52% x̄: 17.88% x̃: 17.88%
95% mean confidence interval for instructions value: -1.15 -0.15
95% mean confidence interval for instructions %-change: -1.83% 1.39%
Inconclusive result (%-change mean confidence interval includes 0).
total cycles in shared programs: 238189718 -> 238189802 (<.01%)
cycles in affected programs: 75076 -> 75160 (0.11%)
helped: 3
HURT: 31
helped stats (abs) min: 2 max: 130 x̄: 44.67 x̃: 2
helped stats (rel) min: 0.18% max: 5.70% x̄: 2.02% x̃: 0.19%
HURT stats (abs) min: 2 max: 70 x̄: 7.03 x̃: 4
HURT stats (rel) min: 0.07% max: 6.41% x̄: 0.53% x̃: 0.15%
95% mean confidence interval for cycles value: -7.27 12.21
95% mean confidence interval for cycles %-change: -0.33% 0.94%
Inconclusive result (value mean confidence interval includes 0).
No fossil-db changes on any Intel platform.
Fixes: 68420d8322c ("nir: Simplify min and max of b2f")
Closes: #1346
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9122>
(cherry picked from commit 7e127c1fca6bd934469f4803dde54842fbd100da)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f656ef672d3006e59b6168903ff5d6d85aebaec9
Author: Yevhenii Kharchenko <yevhenii.kharchenko at globallogic.com>
Date: Thu Feb 4 12:23:30 2021 +0200
st/mesa: fix PBO download for TEXTURE_1D_ARRAY textures
Fixes 'nir_tex_src_coord' param was provided to NIR 'txf' operation as a
vec3 for TEXTURE_1D_ARRAY target, causing an assert.
Only following targets require vec3: TEXTURE_2D_ARRAY, TEXTURE_3D,
TEXTURE_CUBE, TEXTURE_CUBE_ARRAY. The rest must use vec2.
Packing layer value into Y-coordinate the same way it was done in
'create_fs' in commit 2bf6dfac.
Fixes: a01ad311 ("st/mesa: Add NIR versions of the PBO upload/download
shaders. ")
Signed-off-by: Yevhenii Kharchenko <yevhenii.kharchenko at globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9014>
(cherry picked from commit 1516b6bd9a5307ad37f10b1b1c614e399f4bce2d)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fd153b6dfbab0637131d5f60620746f4723560e
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Thu Feb 18 23:34:41 2021 +0100
radv: set correct value for OFFCHIP_BUFFERING on GFX10+
Higher values break tessellation. I was only able to reproduce this
by switching back/from AMDVLK which was really weird...
According to Marek (1c6eca23fdd8), it looks like it's related to
register shadowing and PAL enables it, that probably explains a bit.
Copied from PAL and RadeonSI.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4207
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2498
Fixes: 74d69299d16 ("radv/gfx10: double the number of tessellation offchip buffers per SE")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9141>
(cherry picked from commit e3bdf815b790be61f5141afe630bb8eb1453a0ce)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ae0a97ca553f98ef8ed1a0dc21e1c1511fa478b
Author: Timur Kristóf <timur.kristof at gmail.com>
Date: Tue Feb 9 19:20:52 2021 +0100
aco: Disallow LSHS temp-only I/O when VS output is written indirectly.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9100>
(cherry picked from commit a6e1178f917f73261940dee66cfba3e5211c29f9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=759ea48de82a4d0affec551ded196f6c092ef719
Author: Timur Kristóf <timur.kristof at gmail.com>
Date: Wed Feb 17 13:55:04 2021 +0100
radv/llvm: Fix reporting LDS stats of tess control shaders.
The LLVM backend forgot to set config->lds_size, which is used
for reporting LDS stats.
Fixes: cf89bdb9ba9c7a7ba39d142ee3c83e0379c2092a "radv: align the LDS size in calculate_tess_lds_size()"
Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9098>
(cherry picked from commit 72c348f85c746a574974e18d3d0a3a30b2c43a26)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=367b48e510f9e39d8b06beabc047e8a5f31e8370
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Feb 17 15:08:12 2021 -0600
anv/formats: Advertise linear sampling on depth formats
They've all supported it since either forever or Iron Lake which is
equivalent to forever for Vulkan.
From Kenneth Graunke's GitLab review:
"Linear blending of depth buffer data is usually fairly nonsense
(something's 2 meters away? another thing's 6 meters away? let's
just report 4 meters?)...but it's definitely a thing we can do, so
we may as well let apps do it, and trust them not when it doesn't
make sense."
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9110>
(cherry picked from commit 56d005c21c1e679c62214e89497766d097da6f38)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1dcfbfbfd9dc12a77291be91e923d4b25393568f
Author: Anuj Phogat <anuj.phogat at gmail.com>
Date: Wed Feb 17 14:24:20 2021 -0800
intel/anv: Fix condition for planar yuv surface
Test the sampler->conversion for NULL pointer before dereferencing it.
Fixes: Regressions in VulkanCTS.
Fixes: 226316116cd "intel/anv: Fix condition to set MipModeFilter for YUV surface"
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
(cherry picked from commit 69e94e8939f79041b9cc21f03286b24166a0d746)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f99cab1c03399bddca75eb8441455eba342ee31a
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Sat Feb 13 14:11:58 2021 -0800
intel/compiler: Use CMPN for min / max on Gen4 and Gen5
On Intel platforms before Gen6, there is no min or max instruction.
Instead, a comparison instruction (*more on this below) and a SEL
instruction are used. Per other IEEE rules, the regular comparison
instruction, CMP, will always return false if either source is NaN. A
sequence like
cmp.l.f0.0(16) null<1>F g30<8,8,1>F g22<8,8,1>F
(+f0.0) sel(16) g8<1>F g30<8,8,1>F g22<8,8,1>F
will generate the wrong result for min if g22 is NaN. The CMP will
return false, and the SEL will pick g22.
To account for this, the hardware has a special comparison instruction
CMPN. This instruction behaves just like CMP, except if the second
source is NaN, it will return true. The intention is to use it for min
and max. This sequence will always generate the correct result:
cmpn.l.f0.0(16) null<1>F g30<8,8,1>F g22<8,8,1>F
(+f0.0) sel(16) g8<1>F g30<8,8,1>F g22<8,8,1>F
The problem is... for whatever reason, we don't emit CMPN. There was
even a comment in lower_minmax that calls out this very issue! The bug
is actually older than the "Fixes" below even implies. That's just when
the comment was added. That we know of, we never observed a failure
until #4254.
If src1 is known to be a number, either because it's not float or it's
an immediate number, use CMP. This allows cmod propagation to still do
its thing. Without this slight optimization, about 8,300 shaders from
shader-db are hurt on Iron Lake.
Fixes the following piglit tests (from piglit!475):
tests/spec/glsl-1.20/execution/fs-nan-builtin-max.shader_test
tests/spec/glsl-1.20/execution/fs-nan-builtin-min.shader_test
tests/spec/glsl-1.20/execution/vs-nan-builtin-max.shader_test
tests/spec/glsl-1.20/execution/vs-nan-builtin-min.shader_test
Closes: #4254
Fixes: 2f2c00c7279 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8115134 -> 8115135 (<.01%)
instructions in affected programs: 229 -> 230 (0.44%)
helped: 0
HURT: 1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 3c31364f5e7d34fdc977de20808bbb361f77184e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ee04359c346a1c156764b2ec8057dca23e08775
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Sat Feb 13 13:22:41 2021 -0800
intel/compiler: Make the CMPN builder work like the CMP builder
Since the CMPN builder was never used, there was no reason to make its
interface usable. :)
Fixes: 2f2c00c7279 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 684ec33c79a068bacff70c3414342ee895501926)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c70ece7eb60997a1e0855dad600102b267e9d51
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Sat Feb 13 14:11:30 2021 -0800
intel/compiler: Enable the ability to emit CMPN instructions
v2: Move checks to the EU validator. Suggested by Jason.
Fixes: 2f2c00c7279 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 6c8e2e9317fe221eb360c37021e0a43155701a06)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cce41638d330d703a044a98b5c1e7eae6e1a272c
Author: Anuj Phogat <anuj.phogat at gmail.com>
Date: Thu Feb 11 17:44:32 2021 -0800
intel/anv: Fix condition to set MipModeFilter for YUV surface
Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces.
Add the missing condition to check for planar format.
Fixes: b24b93d5843 "anv: enable VK_KHR_sampler_ycbcr_conversion"
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
(cherry picked from commit 226316116cd1e48a8f0734aa58669f98294d3d19)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0d85d2d1075f40a7e5561843d18058f75e8cb76
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Tue Feb 16 11:44:14 2021 -0500
gallium/trace: add a pipe_screen::get_compiler_options method
this fixes crashes on startup
Fixes: a3512ddfdf7 ("st/mesa: don't enable NV_copy_depth_to_color if NIR doesn't support FP64")
fixes mesa/mesa#4312
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9082>
(cherry picked from commit 4feca7ecde9f5486a55dffe8d6899d1114b799bf)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=846b536f4090f17c192ef4219132f5704025c96b
Author: Vinson Lee <vlee at freedesktop.org>
Date: Sat Feb 13 20:34:39 2021 -0800
etnaviv: Fix memory leak in etna_vertex_elements_state_create.
Fix defect reported by Coverity Scan.
Resource leak (RESOURCE_LEAK)
leaked_storage: Variable cs going out of scope leaks the storage it points to.
Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs")
Signed-off-by: Vinson Lee <vlee at freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9034>
(cherry picked from commit a7a7d25e5b909711e3649eba2f24cc04dca8ab20)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=92133706ae66eeb15d90e6d5b6b892488a5fa36c
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Wed Oct 28 16:28:46 2020 -0500
intel/fs: Shuffle can't handle source modifiers
On Gen7, we have to split shuffles into two MOVs for 64-bit types so we
can't handle source modifiers. On Gen12.5, we have to use integer types
all the time so we can't use them there either. Fixing that will be a
different commit but it interacts with this one.
Fixes: 90c9f29518d "i965/fs: Add support for nir_intrinsic_shuffle"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
(cherry picked from commit 3ce6ca7214d022d04414dd9618d2c8146dc1da4f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ceb469c73c0399b7db1227fd3e51e613c1e8af7
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Feb 4 15:45:11 2021 -0600
nir: Don't optimize bcsel-of-shuffle across blocks
We can't move the shuffle to a new block so this only works if the
shuffle and the bcsel are in the same block. Fortunately, in the
motivating case, this is true.
Also, we have to be careful around discard. We could try really hard to
just avoid moving them past discard but we choose to simply bail if we
see a discard instead.
Fixes: 4ff4d4e56966a40 "nir/opt_intrinsic: Optimize bcsel(b, shuffle..."
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
(cherry picked from commit ceb6986d341abc97908af96461ddc6fc3c85b3a8)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5c4b99c54a6641b4c80e80df02339a98f658a82
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Mon Feb 15 15:22:46 2021 -0500
zink: handle 1bit undef values in ntv
spirv requires that 1bit values be bool types, not uints
Fixes: 93af00502eb ("zink: use uvec for undefs")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9059>
(cherry picked from commit 8300bc1f1694dadb4af4a134ed1100de152e5eaf)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=17aac7926a8bf06873fc8b9b5a03a3508131714f
Author: Daniel Schürmann <daniel at schuermann.dev>
Date: Fri Feb 5 18:25:18 2021 +0100
aco: fix shared VGPR allocation on RDNA2
VGPRs are now allocated in blocks of 8 normal
or 16 shared VGPRs, respectively.
Fixes: 14a5021aff661a26d76f330fec55d400d35443a8 ('aco/gfx10: Refactor of GFX10 wave64 bpermute.')
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
(cherry picked from commit bacc3b36f55ed1f0fbb8a7efdfb072a0f3ee4ee1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0b7f2318517124778a489e4ae0b970f89a677d8
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Thu Feb 11 20:32:00 2021 +0100
radv: Ignore WC flags for VRAM.
Otherwise there might be buffers for which we don't have a type.
Fixes: 7262c743dc8 ("radv: Determine memory type for import based on fd.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4280
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8996>
(cherry picked from commit 045a85085afeed0afae1969a6fc52610f060bab5)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6026389415d4451690a5b068b8ef22b1e7f3da72
Author: Giovanni Mascellani <gmascellani at codeweavers.com>
Date: Fri Feb 12 08:36:58 2021 +0100
anv: Allow null handle in DestroyDescriptorUpdateTemplate.
By the Vulkan specification, and similarly to many other Vulkan calls,
it is allowed to destroy a null descriptor update template.
Signed-off-by: Giovanni Mascellani <gmascellani at codeweavers.com>
Fixes: af5f13e58c9dfe ("anv: add VK_KHR_descriptor_update_template support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9005>
(cherry picked from commit 72b8e643b0232dfcdcbc9f071c410653bc10d079)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1852736ee364cbbabf9b777bed07dc8a9f8dcd54
Author: Giovanni Mascellani <gmascellani at codeweavers.com>
Date: Thu Feb 11 14:27:39 2021 +0100
disk_cache: Fail creation when cannot inizialize queue.
Signed-off-by: Giovanni Mascellani <gmascellani at codeweavers.com>
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
Fixes: e2c4435b078a ("util/disk_cache: add thread queue to disk cache")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8983>
(cherry picked from commit c6731daa5e70a28f5577a7aa572cad59e49caba2)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f41b4cafeb375f64b5528c04e43fc3de5a0fbfeb
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Thu Feb 11 17:38:11 2021 +0200
anv: discard all timeline wait/signal value=0
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 34f32a6d664807 ("anv: implement VK_KHR_timeline_semaphore")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4277
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8987>
(cherry picked from commit 6673c40011c0183953718f45bf0b9b4cba06bee5)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b023a1fb8aab49c80c310c9446cf81236d59464
Author: Timur Kristóf <timur.kristof at gmail.com>
Date: Mon Feb 8 17:58:15 2021 +0100
tgsi_to_nir: Fix uniform ranges.
Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
Fixes: f3b33a5a35e605101d45213bddf52f2f800a52bb
Closes: #4127
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8920>
(cherry picked from commit e163f1c9493c7eab4c6c5f86e3dbf5f097729c18)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1fd036ed3e3dcd6223c5489b1e3f7ab529cdb37a
Author: Dave Airlie <airlied at redhat.com>
Date: Thu Feb 11 13:42:09 2021 +1000
glsl: fix leak in gl_nir_link_uniform_blocks
asan on llvmpipe with piglit tests/spec/arb_gl_spirv/execution/ssbo/array-indirect.shader_test
reported.
=================================================================
==3288325==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 48 byte(s) in 1 object(s) allocated from:
#0 0x7f5b2d6513cf in __interceptor_malloc (/lib64/libasan.so.6+0xab3cf)
#1 0x7f5b2a1ae810 in ralloc_size ../src/util/ralloc.c:133
#2 0x7f5b2a1ae7e1 in ralloc_context ../src/util/ralloc.c:120
#3 0x7f5b2b210177 in gl_nir_link_uniform_blocks ../src/compiler/glsl/gl_nir_link_uniform_blocks.c:585
#4 0x7f5b2af7f52d in gl_nir_link_spirv ../src/compiler/glsl/gl_nir_linker.c:614
#5 0x7f5b2a3b76fa in st_link_nir ../src/mesa/state_tracker/st_glsl_to_nir.cpp:765
#6 0x7f5b2a3ace7b in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:65
#7 0x7f5b2a471165 in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3122
#8 0x7f5b2a97a6d8 in link_program ../src/mesa/main/shaderapi.c:1311
#9 0x7f5b2a97a6d8 in link_program_error ../src/mesa/main/shaderapi.c:1419
#10 0x7f5b2a97df45 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1911
#11 0x7f5b299b59e5 in stub_glLinkProgram /mnt/devel/gl/piglit/tests/util/piglit-dispatch-gen.c:33956
#12 0x40a71a in link_and_use_shaders /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:1604
#13 0x415722 in init_test /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:5225
#14 0x4164ce in piglit_init /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:5597
#15 0x7f5b29a214e9 in run_test /mnt/devel/gl/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:73
#16 0x7f5b29a103fe in piglit_gl_test_run /mnt/devel/gl/piglit/tests/util/piglit-framework-gl.c:229
#17 0x407847 in main /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:72
#18 0x7f5b2928f1e1 in __libc_start_main (/lib64/libc.so.6+0x281e1)
SUMMARY: AddressSanitizer: 48 byte(s) leaked in 1 allocation(s).
Fixes: 57239192 ("nir/linker: add gl_nir_link_uniform_blocks.c")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8974>
(cherry picked from commit 14b2dc0013c73fbd47d232b2f3ff47d29f1f624c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a816cdd489cd56d5fc1b9a4a278e69ee1df8bda5
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Sun Dec 6 23:22:45 2020 +0200
anv: only signal wsi fence BO on last command buffer
I'm pretty sure this doesn't fix anything because the WSI code only
use a single VkSubmitInfo, but better be safe.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: ccb7d606f1a293 ("anv: Use submit-time implicit sync instead of allocate-time")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8934>
(cherry picked from commit 64cb03a52dc97e737b1e24eec6499223021174ce)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=16b5161820ffa6965a08734bd4a3e66a326b316b
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Tue Jan 12 16:18:47 2021 +0000
aco: do not flag all blocks WQM to ensure we enter all nested loops in WQM
This should no longer be necessary since the mark_block_wqm() we use to
flag break conditions as WQM now adds block to the worklist. With them
added to the worklist, get_block_needs() will add WQM to block_needs.
Adding WQM to block_needs here without adding the block to the worklist
(like we do here) can cause issues because it does not ensure that the
predecessors' branches are in WQM (needed for it to be possible to
transition to WQM in the block). This happened in an Overwatch shader.
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Fixes: 661922f6ac9 ("aco: add block to worklist in mark_block_wqm()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4066
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8446>
(cherry picked from commit f0074a6f0532196f5d9d2be00a9d884100401816)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e1d58cc3be09c66221aa875566523e8c749fcd0
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Mon Feb 8 15:24:30 2021 +0100
radv: Fix vram override with fully visible VRAM.
Fixes: cf2eebdf4f1 ("radv,gallium: Add driconf option to reduce advertised VRAM size.")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8915>
(cherry picked from commit bd7d8a77e9a767b81d73e7820c48c2325101ffac)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0db8ef26d686fcdddcecb8f64ce052df99053e4
Author: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Date: Wed Feb 3 20:58:31 2021 -0800
spirv: Allow variable pointers pointing to an array of blocks
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Cc: mesa-stable
Tested-by: Tapani Pälli <tapani.palli at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8864>
(cherry picked from commit 568a66825912d17d5a1a7f9a0dea188c079c51fc)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=56f85e2ddd0129d709173bf25278ff47329efaa3
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Tue Feb 2 16:04:57 2021 -0800
nir/algebraic: Fix a >> #b << #b for sizes other than 32-bit
The base mask previously used was 0xffffffff. This is not correct (but
should still work) for 16-bit and 8-bit values, but it means the high
32-bits of 64-bit values will get chopped off.
Instead of just restricting the pattern to 32-bits (as was done before
00b28a50b2c), this extends the optimization in two ways:
1. Make it correct for other bit sizes.
2. Make it work for arbitrary shift counts.
This has the added benefit of reducing the number of patterns actually
added (7 previously, 4 now).
The "Reassociate for improved CSE" part is just reverted to its
pre-00b28a50b2c behavior. I doubt that pattern is likely to have much
impact outside 32-bits.
This change fixes the piglit tests
tests/spec/arb_gpu_shader_int64/fs-shl-of-shr-int64.shader_test and
tests/spec/arb_gpu_shader_int64/fs-iand-of-iadd-int64.shader_test.
All of the shaders helped in shader-db are vertex shaders on platforms
with vector-oriented vertex processing. The shaders contain ((x >> 16)
<< 16). These platforms set lower_extract_word, so the optimization
that transforms (x >> 16) to extract_u16 doesn't trigger. With only ~60
shaders involved, I didn't bother trying to add extract_XYZ versions of
these patterns to try to get those cases.
Fixes: 00b28a50b2c ("nir/algebraic: trivially enable existing 32-bit patterns for all bit sizes")
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Haswell and earlier Intel GPUs had simlar results. (Haswell shown)
total instructions in shared programs: 16397554 -> 16397496 (<.01%)
instructions in affected programs: 7961 -> 7903 (-0.73%)
helped: 58
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.36% max: 1.89% x̄: 0.99% x̃: 0.78%
95% mean confidence interval for instructions value: -1.00 -1.00
95% mean confidence interval for instructions %-change: -1.13% -0.85%
Instructions are helped.
total cycles in shared programs: 1035483770 -> 1035483504 (<.01%)
cycles in affected programs: 75922 -> 75656 (-0.35%)
helped: 44
HURT: 2
helped stats (abs) min: 2 max: 12 x̄: 6.14 x̃: 2
helped stats (rel) min: 0.05% max: 1.67% x̄: 0.87% x̃: 0.72%
HURT stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel) min: 0.06% max: 0.06% x̄: 0.06% x̃: 0.06%
95% mean confidence interval for cycles value: -7.28 -4.29
95% mean confidence interval for cycles %-change: -1.03% -0.63%
Cycles are helped.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8852>
(cherry picked from commit 6b0443a9008ac4c004b1f3fb846b5c1e8c961df2)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6a980c7bc910816bdc07114484aea505fdbce48e
Author: Simon Ser <contact at emersion.fr>
Date: Thu Jan 14 19:12:32 2021 +0100
nouveau/nv50: fix linear buffer alignment for scan-out/cursors
The hardware can only scan-out linear buffers with a pitch
aligned to 256. It can only use packed buffers for cursors.
Signed-off-by: Simon Ser <contact at emersion.fr>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8500>
(cherry picked from commit a4c11385b7107c89558f3d0e23234bfcb52664a6)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=10a1a7bbcdff0faae1057420284c670c7599edfe
Author: Simon Ser <contact at emersion.fr>
Date: Thu Jan 14 19:02:41 2021 +0100
nouveau/nvc0: fix linear buffer alignment for scan-out/cursors
The hardware can only scan-out linear buffers with a pitch
aligned to 256. It can only use packed buffers for cursors.
Signed-off-by: Simon Ser <contact at emersion.fr>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
Closes: https://gitlab.freedesktop.org/drm/nouveau/-/issues/36
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8500>
(cherry picked from commit 6650c53e64198d1b2a283778e620be8458765dae)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4889cd7345ecbea4703ff15bd8b9409ae816f93c
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Wed Sep 23 03:04:27 2020 +0200
radv: Improve spilling on discrete GPUs.
The linked bug gets better performance and I personally verified
better spilling performance on HZD so let us make this step for now.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3183
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3698
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6833>
(cherry picked from commit 862b6a9a97ad9c47c14dbc76ea892293573c746f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ef16ec38b783fd59f4e6f320ac21c738e641c84
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Wed Feb 3 07:17:17 2021 -0500
radv: zero the bo descriptor array when allocating a new set
this must be reset to avoid issues when using VK_DESCRIPTOR_BINDING_PARTIALLY_BOUND_BIT_EXT
when some descriptors in the set may not have been bound
fixes #4219
Fixes: 126d5adb11e ("radv: Use host memory pool for non-freeable descriptors.")
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8840>
(cherry picked from commit 09ce403b2d77ca80eade07562839103ed9b46f0b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=392e0e54037b2a52b3d206d4af66a0d072ba639f
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Tue Feb 2 19:59:12 2021 -0500
radv: null bo list pointer for null descriptors on update
failing to unset any existing pointers here leads to stale bo entries in
the list and then the kernel rejecting the cmdbuf with ENOENT
Fixes: 126d5adb11e ("radv: Use host memory pool for non-freeable descriptors.")
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8840>
(cherry picked from commit 2f534c2e2ee97b89c43f155c0e2f9efe5a3dffac)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d26b43c2e1a98853b3987ef102532de2f83a3aad
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Wed Jan 27 14:04:10 2021 +0000
aco: always set exec_live=false
Register demand calculation for exec masks doesn't always match
get_live_changes() and get_temp_registers(). For now, just set
exec_live=false.
fossil-db (GFX10.3):
Totals from 108230 (77.64% of 139391) affected shaders:
SGPRs: 5759658 -> 5756818 (-0.05%); split: -0.08%, +0.03%
VGPRs: 4061104 -> 4061248 (+0.00%); split: -0.00%, +0.01%
SpillSGPRs: 14114 -> 15198 (+7.68%); split: -0.10%, +7.78%
CodeSize: 266548396 -> 266603288 (+0.02%); split: -0.01%, +0.03%
MaxWaves: 1390885 -> 1390855 (-0.00%); split: +0.00%, -0.00%
Instrs: 50983353 -> 50992972 (+0.02%); split: -0.02%, +0.04%
Cycles: 1733042048 -> 1735443264 (+0.14%); split: -0.02%, +0.16%
VMEM: 41933625 -> 41914722 (-0.05%); split: +0.04%, -0.09%
SMEM: 7197675 -> 7197789 (+0.00%); split: +0.16%, -0.16%
VClause: 1050885 -> 1050978 (+0.01%); split: -0.02%, +0.03%
SClause: 2074913 -> 2071844 (-0.15%); split: -0.23%, +0.08%
Copies: 3181464 -> 3188125 (+0.21%); split: -0.38%, +0.59%
Branches: 1127526 -> 1127716 (+0.02%); split: -0.10%, +0.12%
PreSGPRs: 3376687 -> 3586076 (+6.20%); split: -0.00%, +6.20%
PreVGPRs: 3339740 -> 3339811 (+0.00%)
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8807>
(cherry picked from commit d1f93261b17d73eceb16b7081000b5bb8f6608f2)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c344f18bf46e4deb8bb496c29afbf579204721d3
Author: Boris Brezillon <boris.brezillon at collabora.com>
Date: Tue Feb 2 09:32:41 2021 +0100
panfrost: Fix a polygon list corruption in the multi-context case
The polygon list is written by tiler jobs and read by fragment ones,
and nothing should re-use the heap until the fragment job is done.
4fec6c944817 ("panfrost: Add the tiler heap to fragment jobs") fixed
this for the !multi-context case by adding the heap BO to fragment job.
But the tiler heap is shared accross contexts, and vertex/tiler+fragment
job submission is done through 2 separate ioctls, meaning that
vertex/tiler and fragment jobs from 2 different context might be
interleaved.
Add a lock at the device level to ensure tiler/vertex+fragment jobs are
submitted sequentially, with no other jobs using the same tiler heap
in-between.
Cc: mesa-stable
Fixes: d8deb1eb6a22 ("panfrost: Share tiler_heap across batches/contexts")
Reported-by: Icecream95 <ixn at disroot.org>
Signed-off-by: Boris Brezillon <boris.brezillon at collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Tested-by: Icecream95 <ixn at disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8822>
(cherry picked from commit 66125c429fe7ced20e1125b9a439ae98d5fab993)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=42bfcf6df2e6f822687621f85b2e0b9da9fabf04
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Feb 3 14:17:46 2021 +1000
zink: don't pick a cpu device ever.
This goes down the list and picks the first non-cpu device, when
we merge the CI patch we should add a forcing env var in here.
Fixes: 8d46e35d1 ("zink: introduce opengl over vulkan")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8845>
(cherry picked from commit e41b0202c9af96d511546e2e9c78742e86fb981f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5321b5cd0eebe41ddfca39d4287641ac872a4857
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Feb 2 19:52:09 2021 +0100
radv: fix waiting on the last enabled RB for occlusion queries
Wait on the last enabled RB, not the last RB. This fixes GPU hangs
because the GPU was waiting forever.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4212
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8836>
(cherry picked from commit 7e47fe9a940f3989caf98024fdc584641601fa2e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0924d2e53a687999264ddbc42b57c767271f3d67
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Tue Feb 2 11:13:11 2021 +0000
radv: correctly enable WGP_MODE for tessellation control
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8811>
(cherry picked from commit 0602d4ec69779db11008a8e370b1c46442fc7784)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9beec5e1892c0d793e7c4f47aeb580fa8d3ffca6
Author: Boris Brezillon <boris.brezillon at collabora.com>
Date: Mon Jan 25 11:38:14 2021 +0100
panfrost: Fix tiler job injection (again)
2f1947b39ca5 ("panfrost: Fix tiler job injection") had the tests
inverted: WRITE_VALUE jobs are only needed on Midgard, not Bifrost.
Cc: mesa-stable
Fixes: 2f1947b39ca5 ("panfrost: Fix tiler job injection")
Signed-off-by: Boris Brezillon <boris.brezillon at collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8808>
(cherry picked from commit ec6c6f610c4e8fc69e3d86bef56cf64eeaccbd4a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ef133ee9ebbe261f70fe177e68fd48151bb6e89
Author: Yevhenii Kolesnikov <yevhenii.kolesnikov at globallogic.com>
Date: Thu Dec 24 01:16:38 2020 +0200
nir/from_ssa: consider defs in sibling blocks
If def a and def b are in sibling blocks, the one with higher
parent_instr's index does not necessarily come after the other.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3712
Fixes: 943ddb945877fc8 "nir: Add a better out-of-SSA pass"
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov at globallogic.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8246>
(cherry picked from commit fd05620e437e4957c9408cae249517f00236cee6)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=313f36458edfa77c6cbaa9a3f8319d5541352d11
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Mon Feb 1 13:19:26 2021 +0100
radv: Do not hash vk_object_base in descriptor set layout.
It contains potentially pointer-y stuff.
Fixes: 178adfa6a8e ("radv: use the base object struct types")
Acked-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8809>
(cherry picked from commit 1eaefe6cfd16186a88dbc1205c0cf16996bec0b6)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1dd3d1d7265944d8414aca0893811fdb0235fc87
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Dec 19 01:48:40 2020 -0500
mesa: flush glBegin/End before changing GL_DEPTH_STENCIL_TEXTURE_MODE
Fixes: 23e81b93bbe3 "mesa: Add core API support for GL_ARB_stencil_texturing (from 4.3)."
Reviewed-by: Zoltán Böszörményi <zboszor at gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8181>
(cherry picked from commit a1f16b59b3ce7e1498e08d57947bbc9cf78624ed)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5410bfe221663efae2e5b4592d87b26fca6d0990
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Fri Jan 8 21:38:09 2021 -0500
pan/bi: Fix M1/M2 decoding in disassembler
C's definition of the % operator has a footgun around sign conversion.
Avoid it and just use bitwise arithemtic instead like the hardware
would, fixing the disassembly and making buggy assembly more obvious.
Fixes: 08a9e5e3e89 ("pan/bi: Decode M values in disasm")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
(cherry picked from commit a69c73988b26aaaa6bffde1b3fef5fdc4a7a90a7)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a8de553622e34f6d05314fc20362d3cf5dd475c
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Fri Jan 29 09:51:26 2021 +0100
radv: fix centroid with VRS coarse shading
Ported from RadeonSI.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8775>
(cherry picked from commit 718c4726f394874c1a7a9ac72e91ea7913a0bc0a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8a49cf88e2981ff818c4d6dd3a86647dc745a4d
Author: James Park <jpark37 at lagfreegames.com>
Date: Mon Dec 14 11:35:13 2020 -0800
gallium/tessellator: Fix warning suppression
Single-line version of MSVC warning suppression does not extend beyond
the #endif directive. Use push/disable/pop instead.
Also suppress 26452, which is a similar analysis warning.
This could also be fixed with constexpr if, but C++17 would be required.
Fixes: 790516db0bf ("gallium/swr: fix gcc warnings")
Reviewed-by: Jesse Natalie <jenatali at microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8093>
(cherry picked from commit 3c7062417bedb203a0a58e27e85febd55c75cbce)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cd40fda33ca839aa285658f2f9b777fe1dea56c
Author: Icecream95 <ixn at disroot.org>
Date: Fri Jan 29 12:48:56 2021 +1300
panfrost: Add the tiler heap to fragment jobs
In some cases the GPU reads from the tiler heap in fragment jobs, so
always add it to GPU jobs.
Fixes faults in many applications that use multiple windows
(e.g. Firefox, plasmashell).
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4157
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8773>
(cherry picked from commit 4fec6c9448171c9d80b34a3ec215a1864ad28725)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1781c29969a379784a0b93a35ce3aef77349943c
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Jan 27 18:40:16 2021 -0500
glthread: fix interpreting vertex size == GL_BGRA for vertex attribs
Fixes: c9c9f57b022 - glthread: track pointers and strides for Pointer & EXT_dsa attrib functions
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4116
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Reviewed-by: Zoltán Böszörményi <zboszor at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8753>
(cherry picked from commit 76c322a48defa384731734a130699df9e8c064f9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ba42594cc45f66676974cfaf3644354c422eb42
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Wed Jan 27 12:01:26 2021 -0800
i965: Don't parse driconf again
It was already parsed in intelInitScree2, and the results are stored in
the screen.
Fixes: d67ef485804 ("i965/screen: Allow drirc to set 'allow_rgb10_configs' again.")
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7387>
(cherry picked from commit 0f1a8f8a6d231c0e265eb22781a0002baa1823b0)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=47049b920b1aa27690e1abd62e23a7c368e7c7c6
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Wed Jan 13 14:34:13 2021 -0800
iris: Disable aux as needed in iris_flush_resource
Disable compression in iris_flush_resource if the resource lacks a
modifier. When a caller wants to prepare such a resource for sharing
(via eglCreateImage for example), this change enables all reference
holders to access the resource in a common manner - without compression.
This fixes misrendering with 3D-accelerated qemu. A piglit test which
reproduces qemu's behavior, ext_image_dma_buf_import-export-tex, is also
enabled to pass.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2678
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8663>
(cherry picked from commit 40d6b92de9432137db4799d482afe7ae5ad52ae8)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=102bd9aa7cb0357aab147115ef11968277eb2f5f
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Wed Jan 13 14:31:05 2021 -0800
gallium: Flush GL API resources in eglCreateImage
Some drivers need to be able to remove compression from resources before
they are handed to consumers that wouldn't understand or expect it.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8663>
(cherry picked from commit b26f510978d3695dcede49892d6702a605cfbcc5)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d0921d41bb4cfef234989e1f97333e77b917781
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Thu Jan 21 12:21:16 2021 -0800
gallium: Map _DRI_IMAGE_FORMAT_NONE to NULL
Many entries in the dri2_format_table have _DRI_IMAGE_FORMAT_NONE as the
dri_format. Make the result of dri2_get_mapping_by_format a tad more
well-defined by returning NULL when this format is passed into it.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8663>
(cherry picked from commit 0a8cc882024c6c03c96e639ea827361e3be9c92e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7f3efbcd2c6c4bafd0937cfb51cecf5b515aeac
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Jan 26 14:25:32 2021 +0100
nir/algebraic: mark more optimization with fsat(NaN) as inexact
These optimizations are duplicated from the main optimization table
to the late one... And I missed some in the original fix.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3368
Fixes: bc123c396a9 ("nir/algebraic: mark some optimizations with fsat(NaN) as inexact")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8716>
(cherry picked from commit 4c3ad4d06588dcc8f5c4d9e27c746055a013f358)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=becfc38b7fef33bec268b6a3cc616c33d6ce5a0b
Author: Daniel Schürmann <daniel at schuermann.dev>
Date: Mon Jan 25 18:37:29 2021 +0100
aco: fix nir_intrinsic_ballot with wave32
Found by inspection.
Fixes: 21db083504fde3100f0b528f683a087357f5aaff ('aco/wave32: Allow setting the subgroup ballot size to 64-bit.')
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8703>
(cherry picked from commit b06609e90324e8c445eb71eec39158a893c574c3)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=54921ef8d775efbde7ee2444d22bd3d0ce14f613
Author: Dylan Baker <dylan.c.baker at intel.com>
Date: Tue Feb 23 08:31:39 2021 -0800
.pick_status.json: Update to e346f61a91266bde48cc0857f82ca6348e38dc03
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=124d611014bcd933247de801a118380a21af2619
Author: Dylan Baker <dylan.c.baker at intel.com>
Date: Fri Jan 29 20:11:41 2021 -0800
docs: Add sha256sum for 20.3.4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d8c68603f9496b12723216c15bf69976de57e97
Author: Dylan Baker <dylan.c.baker at intel.com>
Date: Fri Jan 29 10:12:53 2021 -0800
VERSION: bump version to 20.3.4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6562bda3f004ecc989b390b2dc2c5f9ee6169b8
Author: Dylan Baker <dylan.c.baker at intel.com>
Date: Fri Jan 29 10:12:48 2021 -0800
docs: add release notes for 20.3.4
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