Mesa (staging/20.3): aco: fix incorrect address calculation for load_barycentric_at_sample

[GitLab Mirror]

Module: Mesa
Branch: staging/20.3
Commit: da6fb037775b5a5f425829c4cb0778f14f8deb4e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=da6fb037775b5a5f425829c4cb0778f14f8deb4e

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Mon Jan  4 10:41:39 2021 +0000

aco: fix incorrect address calculation for load_barycentric_at_sample

Fix address calculation for indirect load_barycentric_at_sample on GFX6-8
with a uniform sample index.

A non-zero uniform sample index does not seem to be tested by CTS.

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3966
Fixes: 93c8ebfa780 ("aco: Initial commit of independent AMD compiler")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8302>
(cherry picked from commit b2d000513e4a9b06d3b073913741dae47a00526e)

---

 .pick_status.json                              | 2 +-
 src/amd/compiler/aco_instruction_selection.cpp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 10974db0e71..326a614dd4b 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -4,7 +4,7 @@
         "description": "aco: fix incorrect address calculation for load_barycentric_at_sample",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "93c8ebfa780ebd1495095e794731881aef29e7d3"
     },
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index bcd289fa9b5..db236f5aced 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -7587,7 +7587,7 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr)
             offset = bld.sop2(aco_opcode::s_lshl3_add_u32, bld.def(s1), bld.def(s1, scc), addr, Operand(sample_pos_offset));
          } else {
             offset = bld.sop2(aco_opcode::s_lshl_b32, bld.def(s1), bld.def(s1, scc), addr, Operand(3u));
-            offset = bld.sop2(aco_opcode::s_add_u32, bld.def(s1), bld.def(s1, scc), addr, Operand(sample_pos_offset));
+            offset = bld.sop2(aco_opcode::s_add_u32, bld.def(s1), bld.def(s1, scc), offset, Operand(sample_pos_offset));
          }
 
          Operand off = bld.copy(bld.def(s1), Operand(offset));