Mesa (master): radv: add radv_htile_get_initial_value() and document the HTILE dword

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Module: Mesa
Branch: master
Commit: 1c539b64846de06c1f54183fca46178b0a91553e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1c539b64846de06c1f54183fca46178b0a91553e

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Dec  9 17:51:10 2020 +0100

radv: add radv_htile_get_initial_value() and document the HTILE dword

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8039>

---

 src/amd/vulkan/radv_cmd_buffer.c |  2 +-
 src/amd/vulkan/radv_private.h    | 30 ++++++++++++++++++++++++++++++
 2 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 3f8c01fea26..8f8733a2bd4 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -6000,7 +6000,7 @@ static void radv_initialize_htile(struct radv_cmd_buffer *cmd_buffer,
 	assert(range->levelCount == 1 || range->levelCount == VK_REMAINING_ARRAY_LAYERS);
 	VkImageAspectFlags aspects = VK_IMAGE_ASPECT_DEPTH_BIT;
 	struct radv_cmd_state *state = &cmd_buffer->state;
-	uint32_t htile_value = radv_image_tile_stencil_disabled(cmd_buffer->device, image) ? 0xfffc000f : 0xfffff3ff;
+	uint32_t htile_value = radv_get_htile_initial_value(cmd_buffer->device, image);
 	VkClearDepthStencilValue value = {0};
 	struct radv_barrier_data barrier = {0};
 
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index cfc517c2330..63f16b91740 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -2088,6 +2088,36 @@ radv_get_ds_clear_value_va(const struct radv_image *image,
 	return va;
 }
 
+static inline uint32_t
+radv_get_htile_initial_value(const struct radv_device *device,
+			     const struct radv_image *image)
+{
+	uint32_t initial_value;
+
+	if (radv_image_tile_stencil_disabled(device, image)) {
+		/* Z only (no stencil):
+		 *
+		 * |31     18|17      4|3     0|
+		 * +---------+---------+-------+
+		 * |  Max Z  |  Min Z  | ZMask |
+		 */
+		initial_value = 0xfffc000f;
+	} else {
+		/* Z and stencil:
+		 *
+		 * |31       12|11 10|9    8|7   6|5   4|3     0|
+		 * +-----------+-----+------+-----+-----+-------+
+		 * |  Z Range  |     | SMem | SR1 | SR0 | ZMask |
+		 *
+		 * SR0/SR1 contains the stencil test results. Initializing
+		 * SR0/SR1 to 0x3 means the stencil test result is unknown.
+		 */
+		initial_value = 0xfffff3ff;
+	}
+
+	return initial_value;
+}
+
 unsigned radv_image_queue_family_mask(const struct radv_image *image, uint32_t family, uint32_t queue_family);
 
 static inline uint32_t