Mesa (master): aco: implement nir_op_vec5
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Fri Jan 8 14:43:26 UTC 2021
Module: Mesa
Branch: master
Commit: 5a4f6313b106ced3a38936641660daa34ba6aafd
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a4f6313b106ced3a38936641660daa34ba6aafd
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Mon Nov 23 13:15:20 2020 +0000
aco: implement nir_op_vec5
Since sparse fetch/load uses vec5 destinations, it may be possible that we
encounter nir_op_vec5.
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
---
src/amd/compiler/aco_instruction_selection.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 0b539692618..b2c1efc6758 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -1197,7 +1197,8 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr)
switch(instr->op) {
case nir_op_vec2:
case nir_op_vec3:
- case nir_op_vec4: {
+ case nir_op_vec4:
+ case nir_op_vec5: {
std::array<Temp,NIR_MAX_VEC_COMPONENTS> elems;
unsigned num = instr->dest.dest.ssa.num_components;
for (unsigned i = 0; i < num; ++i)
More information about the mesa-commit
mailing list