Mesa (master): radv: do not use predication when the range doesn't cover the whole image

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Module: Mesa
Branch: master
Commit: 8754f9e8f962bd7cdc55e69cd1edacf882bf2c9a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8754f9e8f962bd7cdc55e69cd1edacf882bf2c9a

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Thu Jan  7 18:39:52 2021 +0100

radv: do not use predication when the range doesn't cover the whole image

The predication is based on the mip level, so if the image has layers
and DCC is enabled, it should only be used if the range of layers
covers the whole image.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8368>

---

 src/amd/vulkan/radv_meta_fast_clear.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c
index 350a1aa4553..086749dbe55 100644
--- a/src/amd/vulkan/radv_meta_fast_clear.c
+++ b/src/amd/vulkan/radv_meta_fast_clear.c
@@ -740,12 +740,27 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer,
                            const VkImageSubresourceRange *subresourceRange,
                            bool decompress_dcc)
 {
+	bool use_predication = false;
 	bool old_predicating = false;
 
 	assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
 
 	if ((decompress_dcc && radv_dcc_enabled(image, subresourceRange->baseMipLevel)) ||
 	    (!(radv_image_has_fmask(image) && !image->tc_compatible_cmask))) {
+		use_predication = true;
+	}
+
+	if (radv_dcc_enabled(image, subresourceRange->baseMipLevel) &&
+	    (image->info.array_size != radv_get_layerCount(image, subresourceRange) ||
+	    subresourceRange->baseArrayLayer != 0)) {
+		/* Only use predication if the image has DCC with mipmaps or
+		 * if the range of layers covers the whole image because the
+		 * predication is based on mip level.
+		 */
+		use_predication = false;
+	}
+
+	if (use_predication) {
 		uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset :
 							image->fce_pred_offset;
 		pred_offset += 8 * subresourceRange->baseMipLevel;
@@ -759,8 +774,7 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer,
 	radv_process_color_image(cmd_buffer, image, subresourceRange,
 				 decompress_dcc);
 
-	if ((decompress_dcc && radv_dcc_enabled(image, subresourceRange->baseMipLevel)) ||
-	    (!(radv_image_has_fmask(image) && !image->tc_compatible_cmask))) {
+	if (use_predication) {
 		uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset :
 							image->fce_pred_offset;
 		pred_offset += 8 * subresourceRange->baseMipLevel;