Mesa (staging/20.3): aco: fix unreachable() for uniform 8/16-bit nir_op_mov from VGPR

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Module: Mesa
Branch: staging/20.3
Commit: 76ecdf2c32280749819b7d566a1503b52fe222f9
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=76ecdf2c32280749819b7d566a1503b52fe222f9

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Fri Jan  8 11:44:33 2021 +0000

aco: fix unreachable() for uniform 8/16-bit nir_op_mov from VGPR

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Fixes: d20a752c0de ("aco: use Builder::copy more")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8380>
(cherry picked from commit 816b7fb5cb622dd6c5d0fbcecdcb27779029f80f)

---

 .pick_status.json                              |  2 +-
 src/amd/compiler/aco_instruction_selection.cpp | 10 ++++++----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 31f5ed5aafd..343e5579015 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1705,7 +1705,7 @@
         "description": "aco: fix unreachable() for uniform 8/16-bit nir_op_mov from VGPR",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "d20a752c0de426e4c7c64a4d42d10f373f73c97a"
     },
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index c85d173d43d..6d45407203c 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -1208,12 +1208,14 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr)
    }
    case nir_op_mov: {
       Temp src = get_alu_src(ctx, instr->src[0]);
-      if (src.bytes() != dst.bytes())
-         unreachable("wrong src or dst register class for nir_op_mov");
-      if (src.type() == RegType::vgpr && dst.type() == RegType::sgpr)
+      if (src.type() == RegType::vgpr && dst.type() == RegType::sgpr) {
+         /* use size() instead of bytes() for 8/16-bit */
+         assert(src.size() == dst.size() && "wrong src or dst register class for nir_op_mov");
          bld.pseudo(aco_opcode::p_as_uniform, Definition(dst), src);
-      else
+      } else {
+         assert(src.bytes() == dst.bytes() && "wrong src or dst register class for nir_op_mov");
          bld.copy(Definition(dst), src);
+      }
       break;
    }
    case nir_op_inot: {