Mesa (master): radv: allocate and initialize the FCE predicate value for CMASK too
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Wed Jan 13 12:32:03 UTC 2021
Module: Mesa
Branch: master
Commit: 051e2bfe80aca1bf26905f72d437a2d3fd228b0c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=051e2bfe80aca1bf26905f72d437a2d3fd228b0c
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Jan 5 15:07:47 2021 +0100
radv: allocate and initialize the FCE predicate value for CMASK too
In case we don't have DCC, we can still predicate FCE with CMASK.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8332>
---
src/amd/vulkan/radv_cmd_buffer.c | 6 +++---
src/amd/vulkan/radv_image.c | 4 +++-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index c4d1d1e7e2c..3563c0db794 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2135,7 +2135,7 @@ radv_update_fce_metadata(struct radv_cmd_buffer *cmd_buffer,
uint32_t level_count = radv_get_levelCount(image, range);
uint32_t count = 2 * level_count;
- assert(radv_dcc_enabled(image, range->baseMipLevel));
+ assert(image->fce_pred_offset != 0);
radeon_emit(cmd_buffer->cs, PKT3(PKT3_WRITE_DATA, 2 + count, 0));
radeon_emit(cmd_buffer->cs, S_370_DST_SEL(V_370_MEM) |
@@ -6210,12 +6210,12 @@ static void radv_init_color_image_metadata(struct radv_cmd_buffer *cmd_buffer,
}
radv_initialize_dcc(cmd_buffer, image, range, value);
-
- radv_update_fce_metadata(cmd_buffer, image, range, false);
}
if (radv_image_has_cmask(image) ||
radv_dcc_enabled(image, range->baseMipLevel)) {
+ radv_update_fce_metadata(cmd_buffer, image, range, false);
+
uint32_t color_values[2] = {0};
radv_set_color_clear_metadata(cmd_buffer, image, range,
color_values);
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index f532564c485..0ed0e07eaf8 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -1272,10 +1272,12 @@ radv_image_alloc_single_sample_cmask(const struct radv_device *device,
static void
radv_image_alloc_values(const struct radv_device *device, struct radv_image *image)
{
- if (radv_image_has_dcc(image)) {
+ if (radv_image_has_cmask(image) || radv_image_has_dcc(image)) {
image->fce_pred_offset = image->size;
image->size += 8 * image->info.levels;
+ }
+ if (radv_image_has_dcc(image)) {
image->dcc_pred_offset = image->size;
image->size += 8 * image->info.levels;
}
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