Mesa (staging/21.0): aco/RA: fix subdword operands on VOP3P instructions

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Jan 13 19:31:06 UTC 2021


Module: Mesa
Branch: staging/21.0
Commit: 3714b68ec1f93fcb6bb17cb06c20c0c2d29cf952
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3714b68ec1f93fcb6bb17cb06c20c0c2d29cf952

Author: Daniel Schürmann <daniel at schuermann.dev>
Date:   Mon Sep 14 11:59:58 2020 +0100

aco/RA: fix subdword operands on VOP3P instructions

Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 4a75a286987d54d097bc708607c1e8876436ea63)

---

 .pick_status.json                            |  2 +-
 src/amd/compiler/aco_register_allocation.cpp | 16 ++++++++++++++--
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 12f3c7703dd..bafc494b259 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -391,7 +391,7 @@
         "description": "aco/RA: fix subdword operands on VOP3P instructions",
         "nominated": false,
         "nomination_type": null,
-        "resolution": 4,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index 45eaf3ad5c2..d617ecb84ad 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -339,6 +339,8 @@ unsigned get_subdword_operand_stride(chip_class chip, const aco_ptr<Instruction>
       return rc.bytes() % 2 == 0 ? 2 : 1;
    } else if (rc.bytes() == 2 && can_use_opsel(chip, instr->opcode, idx, 1)) {
       return 2;
+   } else if (instr->format == Format::VOP3P) {
+      return 2;
    }
 
    switch (instr->opcode) {
@@ -404,9 +406,15 @@ void add_subdword_operand(ra_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx
          update_phi_map(ctx, tmp.get(), instr.get());
       return;
    } else if (rc.bytes() == 2 && can_use_opsel(chip, instr->opcode, idx, byte / 2)) {
-      VOP3A_instruction *vop3 = static_cast<VOP3A_instruction *>(instr.get());
+      VOP3A_instruction* vop3 = static_cast<VOP3A_instruction *>(instr.get());
       vop3->opsel |= (byte / 2) << idx;
       return;
+   } else if (instr->format == Format::VOP3P && byte == 2) {
+      VOP3P_instruction* vop3p = static_cast<VOP3P_instruction*>(instr.get());
+      assert(!(vop3p->opsel_lo & (1 << idx)));
+      vop3p->opsel_lo |= 1 << idx;
+      vop3p->opsel_hi |= 1 << idx;
+      return;
    }
 
    if (chip >= GFX8 && instr->opcode == aco_opcode::ds_write_b8 && byte == 2) {
@@ -487,6 +495,8 @@ std::pair<unsigned, unsigned> get_subdword_definition_info(Program *program, con
          return std::make_pair(2u, 2u);
       else
          return std::make_pair(2u, 4u);
+   case aco_opcode::v_fma_mixlo_f16:
+      return std::make_pair(2u, 2u);
    default:
       break;
    }
@@ -515,7 +525,9 @@ void add_subdword_definition(Program *program, aco_ptr<Instruction>& instr, unsi
    }
 
    if (reg.byte() == 2) {
-      if (instr->opcode == aco_opcode::buffer_load_ubyte_d16)
+      if (instr->opcode == aco_opcode::v_fma_mixlo_f16)
+         instr->opcode = aco_opcode::v_fma_mixhi_f16;
+      else if (instr->opcode == aco_opcode::buffer_load_ubyte_d16)
          instr->opcode = aco_opcode::buffer_load_ubyte_d16_hi;
       else if (instr->opcode == aco_opcode::buffer_load_short_d16)
          instr->opcode = aco_opcode::buffer_load_short_d16_hi;



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