Mesa (master): radv: do not invalidate the L2 metadata cache on compute queues

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Module: Mesa
Branch: master
Commit: c6849f9687295c2711b99579a3ba9306ec3c0a30
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6849f9687295c2711b99579a3ba9306ec3c0a30

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Thu Jan 14 18:32:16 2021 +0100

radv: do not invalidate the L2 metadata cache on compute queues

The flush VA space was only allocated for command buffers on the
graphics queue. Also, the ZPASS_DONE event should never be emitted
on compute queues because it hangs.

Invalidating the L2 metadata cache is only required for coherency
between the RBs and L2, so only on the graphics queue.

The L2 cache is invalidated at beginning of any IBs and that should
also invalidate the L2 metadata cache for compute anyways.

Fixes: 4a783a3c ("radv: Use L2 coherency on GFX9+.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8494>

---

 src/amd/vulkan/si_cmd_buffer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 4ba23c5b8d2..153acac1c84 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -1507,6 +1507,7 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer)
 	                                          RADV_CMD_FLAG_FLUSH_AND_INV_CB_META |
 	                                          RADV_CMD_FLAG_FLUSH_AND_INV_DB |
 	                                          RADV_CMD_FLAG_FLUSH_AND_INV_DB_META |
+	                                          RADV_CMD_FLAG_INV_L2_METADATA |
 	                                          RADV_CMD_FLAG_PS_PARTIAL_FLUSH |
 	                                          RADV_CMD_FLAG_VS_PARTIAL_FLUSH |
 	                                          RADV_CMD_FLAG_VGT_FLUSH |