Mesa (master): zink: break out some of the u_blitter setup into util function

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Fri Jan 15 16:46:10 UTC 2021


Module: Mesa
Branch: master
Commit: e100746a73f0af337121d0b0386d7f3128d07452
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e100746a73f0af337121d0b0386d7f3128d07452

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Thu Aug 13 17:17:38 2020 -0400

zink: break out some of the u_blitter setup into util function

we'll be using this for more than just zink_blit, so we can reuse some code

Reviewed-by: Adam Jackson <ajax at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8512>

---

 src/gallium/drivers/zink/zink_blit.c    | 41 ++++++++++++++++++++++-----------
 src/gallium/drivers/zink/zink_clear.c   | 20 ++++++++--------
 src/gallium/drivers/zink/zink_context.h |  9 ++++++++
 3 files changed, 47 insertions(+), 23 deletions(-)

diff --git a/src/gallium/drivers/zink/zink_blit.c b/src/gallium/drivers/zink/zink_blit.c
index fa195d21b6a..c91068cd45d 100644
--- a/src/gallium/drivers/zink/zink_blit.c
+++ b/src/gallium/drivers/zink/zink_blit.c
@@ -203,19 +203,9 @@ zink_blit(struct pipe_context *pctx,
       return;
    }
 
-   util_blitter_save_blend(ctx->blitter, ctx->gfx_pipeline_state.blend_state);
-   util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->dsa_state);
    util_blitter_save_vertex_elements(ctx->blitter, ctx->element_state);
-   util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
-   util_blitter_save_rasterizer(ctx->blitter, ctx->rast_state);
-   util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_FRAGMENT]);
-   util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_VERTEX]);
-   util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_CTRL]);
-   util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_EVAL]);
-   util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_GEOMETRY]);
-   util_blitter_save_framebuffer(ctx->blitter, &ctx->fb_state);
    util_blitter_save_viewport(ctx->blitter, ctx->viewport_states);
-   util_blitter_save_scissor(ctx->blitter, ctx->scissor_states);
+
    util_blitter_save_fragment_sampler_states(ctx->blitter,
                                              ctx->num_samplers[PIPE_SHADER_FRAGMENT],
                                              ctx->sampler_states[PIPE_SHADER_FRAGMENT]);
@@ -224,8 +214,33 @@ zink_blit(struct pipe_context *pctx,
                                             ctx->image_views[PIPE_SHADER_FRAGMENT]);
    util_blitter_save_fragment_constant_buffer_slot(ctx->blitter, ctx->ubos[PIPE_SHADER_FRAGMENT]);
    util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->buffers);
-   util_blitter_save_sample_mask(ctx->blitter, ctx->gfx_pipeline_state.sample_mask);
-   util_blitter_save_so_targets(ctx->blitter, ctx->num_so_targets, ctx->so_targets);
+   zink_blit_begin(ctx, ZINK_BLIT_SAVE_FB | ZINK_BLIT_SAVE_FS);
 
    util_blitter_blit(ctx->blitter, info);
 }
+
+/* similar to radeonsi */
+void
+zink_blit_begin(struct zink_context *ctx, enum zink_blit_flags flags)
+{
+   util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_VERTEX]);
+   util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_CTRL]);
+   util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_EVAL]);
+   util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_GEOMETRY]);
+   util_blitter_save_rasterizer(ctx->blitter, ctx->rast_state);
+   util_blitter_save_so_targets(ctx->blitter, ctx->num_so_targets, ctx->so_targets);
+
+   if (flags & ZINK_BLIT_SAVE_FS) {
+      util_blitter_save_blend(ctx->blitter, ctx->gfx_pipeline_state.blend_state);
+      util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->dsa_state);
+      util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
+      util_blitter_save_sample_mask(ctx->blitter, ctx->gfx_pipeline_state.sample_mask);
+      util_blitter_save_scissor(ctx->blitter, ctx->scissor_states);
+      /* also util_blitter_save_window_rectangles when we have that? */
+
+      util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_FRAGMENT]);
+   }
+
+   if (flags & ZINK_BLIT_SAVE_FB)
+      util_blitter_save_framebuffer(ctx->blitter, &ctx->fb_state);
+}
diff --git a/src/gallium/drivers/zink/zink_clear.c b/src/gallium/drivers/zink/zink_clear.c
index f849447b4d3..ad85a7079ee 100644
--- a/src/gallium/drivers/zink/zink_clear.c
+++ b/src/gallium/drivers/zink/zink_clear.c
@@ -143,8 +143,8 @@ clear_zs_no_rp(struct zink_batch *batch, struct zink_resource *res, VkImageAspec
    vkCmdClearDepthStencilImage(batch->cmdbuf, res->image, res->layout, &zs_value, 1, &range);
 }
 
-static struct zink_batch *
-get_clear_batch(struct zink_context *ctx, unsigned width, unsigned height, struct u_rect *region)
+static bool
+clear_needs_rp(unsigned width, unsigned height, struct u_rect *region)
 {
    struct u_rect intersect = {0, width, 0, height};
 
@@ -155,14 +155,14 @@ get_clear_batch(struct zink_context *ctx, unsigned width, unsigned height, struc
     */
    if (!u_rect_test_intersection(region, &intersect))
       /* is this even a thing? */
-      return zink_batch_rp(ctx);
+      return true;
 
     u_rect_find_intersection(region, &intersect);
     if (intersect.x0 != 0 || intersect.y0 != 0 ||
         intersect.x1 != width || intersect.y1 != height)
-       return zink_batch_rp(ctx);
+       return true;
 
-   return zink_curr_batch(ctx);
+   return false;
 }
 
 void
@@ -174,16 +174,16 @@ zink_clear(struct pipe_context *pctx,
 {
    struct zink_context *ctx = zink_context(pctx);
    struct pipe_framebuffer_state *fb = &ctx->fb_state;
-   struct zink_batch *batch;
+   struct zink_batch *batch = zink_curr_batch(ctx);
+   bool needs_rp = false;
 
    if (scissor_state) {
       struct u_rect scissor = {scissor_state->minx, scissor_state->maxx, scissor_state->miny, scissor_state->maxy};
-      batch = get_clear_batch(ctx, fb->width, fb->height, &scissor);
-   } else
-      batch = zink_curr_batch(ctx);
+      needs_rp = clear_needs_rp(fb->width, fb->height, &scissor);
+   }
 
 
-   if (batch->in_rp || ctx->render_condition_active) {
+   if (needs_rp || batch->in_rp || ctx->render_condition_active) {
       clear_in_rp(pctx, buffers, scissor_state, pcolor, depth, stencil);
       return;
    }
diff --git a/src/gallium/drivers/zink/zink_context.h b/src/gallium/drivers/zink/zink_context.h
index 5613302e0b3..273b223a955 100644
--- a/src/gallium/drivers/zink/zink_context.h
+++ b/src/gallium/drivers/zink/zink_context.h
@@ -46,6 +46,12 @@ struct zink_rasterizer_state;
 struct zink_resource;
 struct zink_vertex_elements_state;
 
+enum zink_blit_flags {
+   ZINK_BLIT_NORMAL = 1 << 0,
+   ZINK_BLIT_SAVE_FS = 1 << 1,
+   ZINK_BLIT_SAVE_FB = 1 << 2,
+};
+
 struct zink_sampler_view {
    struct pipe_sampler_view base;
    union {
@@ -191,6 +197,9 @@ zink_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
 void
 zink_context_query_init(struct pipe_context *ctx);
 
+void
+zink_blit_begin(struct zink_context *ctx, enum zink_blit_flags flags);
+
 void
 zink_blit(struct pipe_context *pctx,
           const struct pipe_blit_info *info);



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