Mesa (master): radeonsi: don't pass pipe_draw_info into si_emit_vs_state

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Module: Mesa
Branch: master
Commit: 53f9bb860b29b8481ca13edc423255f327b2a5af
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=53f9bb860b29b8481ca13edc423255f327b2a5af

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sat Dec 26 21:07:40 2020 -0500

radeonsi: don't pass pipe_draw_info into si_emit_vs_state

only one field is used

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

---

 src/gallium/drivers/radeonsi/si_state_draw.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp
index d6993a281e6..d39f9b9c72d 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp
@@ -648,11 +648,11 @@ static void si_emit_rasterizer_prim_state(struct si_context *sctx)
 }
 
 ALWAYS_INLINE
-static void si_emit_vs_state(struct si_context *sctx, const struct pipe_draw_info *info)
+static void si_emit_vs_state(struct si_context *sctx, unsigned index_size)
 {
    if (sctx->vs_shader.cso->info.uses_base_vertex) {
       sctx->current_vs_state &= C_VS_STATE_INDEXED;
-      sctx->current_vs_state |= S_VS_STATE_INDEXED(!!info->index_size);
+      sctx->current_vs_state |= S_VS_STATE_INDEXED(!!index_size);
    }
 
    if (sctx->num_vs_blit_sgprs) {
@@ -1369,7 +1369,7 @@ static void si_emit_all_states(struct si_context *sctx, const struct pipe_draw_i
    sctx->dirty_states = 0;
 
    /* Emit draw states. */
-   si_emit_vs_state(sctx, info);
+   si_emit_vs_state(sctx, info->index_size);
    si_emit_draw_registers<GFX_VERSION, HAS_TESS, HAS_GS, NGG>
          (sctx, info, indirect, prim, num_patches, instance_count, primitive_restart,
           min_vertex_count);