Mesa (master): radeonsi: trim the size of si_vgt_param_key and si_vgt_stages_key

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Mon Jan 18 01:33:15 UTC 2021


Module: Mesa
Branch: master
Commit: b06f3c52bfb63c18686edca2fb6f667c44533df8
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b06f3c52bfb63c18686edca2fb6f667c44533df8

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sat Jan  9 23:54:30 2021 -0500

radeonsi: trim the size of si_vgt_param_key and si_vgt_stages_key

These are the minimum sizes we can use.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

---

 src/gallium/drivers/radeonsi/si_pipe.c         |  2 +-
 src/gallium/drivers/radeonsi/si_pipe.h         | 72 +++++++++++++-------------
 src/gallium/drivers/radeonsi/si_state_draw.cpp |  2 +-
 3 files changed, 38 insertions(+), 38 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 120b32e97f2..cd8f52a88cf 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1339,7 +1339,7 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
 
    ac_print_shadowed_regs(&sscreen->info);
 
-   STATIC_ASSERT(sizeof(union si_vgt_stages_key) == 4);
+   STATIC_ASSERT(sizeof(union si_vgt_stages_key) == 1);
    return &sscreen->b;
 }
 
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 6076be9ff98..71b85f4dd58 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -820,30 +820,30 @@ struct si_shader_ctx_state {
 union si_vgt_param_key {
    struct {
 #if UTIL_ARCH_LITTLE_ENDIAN
-      unsigned prim : 4;
-      unsigned uses_instancing : 1;
-      unsigned multi_instances_smaller_than_primgroup : 1;
-      unsigned primitive_restart : 1;
-      unsigned count_from_stream_output : 1;
-      unsigned line_stipple_enabled : 1;
-      unsigned uses_tess : 1;
-      unsigned tess_uses_prim_id : 1;
-      unsigned uses_gs : 1;
-      unsigned _pad : 32 - SI_NUM_VGT_PARAM_KEY_BITS;
+      uint16_t prim : 4;
+      uint16_t uses_instancing : 1;
+      uint16_t multi_instances_smaller_than_primgroup : 1;
+      uint16_t primitive_restart : 1;
+      uint16_t count_from_stream_output : 1;
+      uint16_t line_stipple_enabled : 1;
+      uint16_t uses_tess : 1;
+      uint16_t tess_uses_prim_id : 1;
+      uint16_t uses_gs : 1;
+      uint16_t _pad : 16 - SI_NUM_VGT_PARAM_KEY_BITS;
 #else /* UTIL_ARCH_BIG_ENDIAN */
-      unsigned _pad : 32 - SI_NUM_VGT_PARAM_KEY_BITS;
-      unsigned uses_gs : 1;
-      unsigned tess_uses_prim_id : 1;
-      unsigned uses_tess : 1;
-      unsigned line_stipple_enabled : 1;
-      unsigned count_from_stream_output : 1;
-      unsigned primitive_restart : 1;
-      unsigned multi_instances_smaller_than_primgroup : 1;
-      unsigned uses_instancing : 1;
-      unsigned prim : 4;
+      uint16_t _pad : 16 - SI_NUM_VGT_PARAM_KEY_BITS;
+      uint16_t uses_gs : 1;
+      uint16_t tess_uses_prim_id : 1;
+      uint16_t uses_tess : 1;
+      uint16_t line_stipple_enabled : 1;
+      uint16_t count_from_stream_output : 1;
+      uint16_t primitive_restart : 1;
+      uint16_t multi_instances_smaller_than_primgroup : 1;
+      uint16_t uses_instancing : 1;
+      uint16_t prim : 4;
 #endif
    } u;
-   uint32_t index;
+   uint16_t index;
 };
 
 #define SI_NUM_VGT_STAGES_KEY_BITS 6
@@ -855,24 +855,24 @@ union si_vgt_param_key {
 union si_vgt_stages_key {
    struct {
 #if UTIL_ARCH_LITTLE_ENDIAN
-      unsigned tess : 1;
-      unsigned gs : 1;
-      unsigned ngg_gs_fast_launch : 1;
-      unsigned ngg_passthrough : 1;
-      unsigned ngg : 1;       /* gfx10+ */
-      unsigned streamout : 1; /* only used with NGG */
-      unsigned _pad : 32 - SI_NUM_VGT_STAGES_KEY_BITS;
+      uint8_t tess : 1;
+      uint8_t gs : 1;
+      uint8_t ngg_gs_fast_launch : 1;
+      uint8_t ngg_passthrough : 1;
+      uint8_t ngg : 1;       /* gfx10+ */
+      uint8_t streamout : 1; /* only used with NGG */
+      uint8_t _pad : 8 - SI_NUM_VGT_STAGES_KEY_BITS;
 #else /* UTIL_ARCH_BIG_ENDIAN */
-      unsigned _pad : 32 - SI_NUM_VGT_STAGES_KEY_BITS;
-      unsigned streamout : 1;
-      unsigned ngg : 1;
-      unsigned ngg_passthrough : 1;
-      unsigned ngg_gs_fast_launch : 1;
-      unsigned gs : 1;
-      unsigned tess : 1;
+      uint8_t _pad : 8 - SI_NUM_VGT_STAGES_KEY_BITS;
+      uint8_t streamout : 1;
+      uint8_t ngg : 1;
+      uint8_t ngg_passthrough : 1;
+      uint8_t ngg_gs_fast_launch : 1;
+      uint8_t gs : 1;
+      uint8_t tess : 1;
 #endif
    } u;
-   uint32_t index;
+   uint8_t index;
 };
 
 struct si_texture_handle {
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp
index 6c68dbb0d9b..19fc0f717e5 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp
@@ -480,7 +480,7 @@ static unsigned si_num_prims_for_vertices(enum pipe_prim_type prim,
 
 static unsigned si_get_init_multi_vgt_param(struct si_screen *sscreen, union si_vgt_param_key *key)
 {
-   STATIC_ASSERT(sizeof(union si_vgt_param_key) == 4);
+   STATIC_ASSERT(sizeof(union si_vgt_param_key) == 2);
    unsigned max_primgroup_in_wave = 2;
 
    /* SWITCH_ON_EOP(0) is always preferable. */



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