Mesa (master): docs: fix sphinx-warnings due to lacking escaping
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Thu Jan 21 17:45:00 UTC 2021
Module: Mesa
Branch: master
Commit: 04c22a69f3bbaa9d785bc4193a3be649d03a9ac4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=04c22a69f3bbaa9d785bc4193a3be649d03a9ac4
Author: Erik Faye-Lund <kusmabite at gmail.com>
Date: Mon Dec 28 13:37:13 2020 +0100
docs: fix sphinx-warnings due to lacking escaping
There's a few more cases that needs proper quoting for Sphinx. Asterisks
and ticks at the start of words, as well as underscores at the end of
symbols, even when they have trailing escaped characters.
We should really find a way to robustly escape these things when
generating them.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8243>
---
docs/relnotes/20.2.3.rst | 2 +-
docs/relnotes/20.2.4.rst | 2 +-
docs/relnotes/20.2.5.rst | 2 +-
docs/relnotes/20.3.0.rst | 44 ++++++++++++++++++++++----------------------
docs/relnotes/20.3.1.rst | 2 +-
5 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/docs/relnotes/20.2.3.rst b/docs/relnotes/20.2.3.rst
index ea129fe628c..06a454a6a82 100644
--- a/docs/relnotes/20.2.3.rst
+++ b/docs/relnotes/20.2.3.rst
@@ -172,7 +172,7 @@ Vinson Lee (4):
- os: Fix open result check.
- amd/addrlib: Add missing va_end.
-- frontends/va: Fix *num_entrypoints check.
+- frontends/va: Fix \*num_entrypoints check.
- vdpau: Add missing printf format specifier.
Woody Chow (1):
diff --git a/docs/relnotes/20.2.4.rst b/docs/relnotes/20.2.4.rst
index 2123b6e12d8..4e94c5bb51b 100644
--- a/docs/relnotes/20.2.4.rst
+++ b/docs/relnotes/20.2.4.rst
@@ -119,7 +119,7 @@ Rhys Perry (7):
- aco: fix combine_constant_comparison_ordering() NaN check with 16/64-bit
- aco: disallow various v_add_u32 opts if modifiers are used
- aco: disable omod if the sign of zeros should be preserved
-- aco: fix fp16 *0.5 omod
+- aco: fix fp16 \*0.5 omod
Suresh Guttula (2):
diff --git a/docs/relnotes/20.2.5.rst b/docs/relnotes/20.2.5.rst
index d45560763b7..c0e0addafef 100644
--- a/docs/relnotes/20.2.5.rst
+++ b/docs/relnotes/20.2.5.rst
@@ -36,7 +36,7 @@ Bug fixes
- Amber test validate_phi_src
- [RADV] broken stencil behaviour when using extended dynamic stencil state
- [RADV] Some bindings seem broken with VK_DYNAMIC_STATE_VERTEX_INPUT_BINDING_STRIDE_EXT
-- ci: Missing needs: in radeonsi-stoney-*?
+- ci: Missing needs: in radeonsi-stoney-\*?
- Triangles appear from the center of the field on PES2021 with Mesa 20.2.x
- [gen9][iris][regression][bisected] flaky piglit tests
- [Intel][OpenGL] Fail to get correct value when sampling from a texture in depth formats.
diff --git a/docs/relnotes/20.3.0.rst b/docs/relnotes/20.3.0.rst
index 2de6a98280e..6ec0dd69cf4 100644
--- a/docs/relnotes/20.3.0.rst
+++ b/docs/relnotes/20.3.0.rst
@@ -159,7 +159,7 @@ Bug fixes
- gen_state_llvm.h:54:99: error: invalid conversion from ‘int’ to ‘const llvm::VectorType*’ \[-fpermissive\]
- Using a shared dEQP build script
- vulkan/wsi/x11: deadlock with Xwayland when compositor holds multiple buffers
-- \[RADV/ACO\] Death Stranding cause a GPU hung (*ERROR\* Waiting for fences timed out!)
+- \[RADV/ACO\] Death Stranding cause a GPU hung (\*ERROR\* Waiting for fences timed out!)
- lp_bld_init.c:172:7: error: implicit declaration of function ‘LLVMAddConstantPropagationPass’; did you mean ‘LLVMAddCorrelatedValuePropagationPass’? \[-Werror=implicit-function-declaration\]
- ci: Use lld or gold instead of ld.bfd
- Intel Vulkan driver crash with alpha-to-coverage
@@ -393,7 +393,7 @@ Alyssa Rosenzweig (388):
- panfrost: Inline max rt into compilers
- panfrost: Treat texture dimension as first-class
- panfrost: Drop compiler cmdstream deps
-- nir/lower_ssbo: Don't set align_\* for atomics
+- nir/lower_ssbo: Don't set align\_\* for atomics
- gallium/dri2: Support Arm modifiers
- panfrost: Set \`initialized\` more conservatively
- panfrost: Remove hint-based AFBC heuristic
@@ -608,7 +608,7 @@ Alyssa Rosenzweig (388):
- pan/bi: Add packing generator
- pan/bi: Add disassembler generator
- pan/bi: Add disassembly prototypes
-- pan/bi: Add bi_disasm_dest_\* helpers
+- pan/bi: Add bi_disasm_dest\_\* helpers
- pan/bi: Export dump_src
- pan/bi: Use new disassembler
- pan/bi: Use canonical syntax for registers/uniforms/imms
@@ -1184,7 +1184,7 @@ Daniel Schürmann (26):
- aco: expand create_vector more carefully w.r.t. subdword operands
- aco: use p_create_vector for nir_op_pack_half_2x16
- nir/opt_algebraic: optimize unpack_half_2x16_split_x(ushr, a, 16)
-- aco: use p_split_vector for nir_op_unpack_half_\*
+- aco: use p_split_vector for nir_op_unpack_half\_\*
- aco: add validation rules for p_split_vector
- aco: use v_cvt_pkrtz_f16_f32 for pack_half_2x16
- radv,aco: lower_pack_half_2x16
@@ -1374,7 +1374,7 @@ Duncan Hopkins (10):
- zink: Added support for MacOS MoltenVK APIs.
- zink: return fail if create_instance fails
- zink: Added inbuilt debug logging from the VK_LAYER_LUNARG_standard_validation layer.
-- zink: add support to device info for macro guards and just VkPhysicalDevice*Features with out the have_.
+- zink: add support to device info for macro guards and just VkPhysicalDevice*Features with out the have\_.
- zink: have_triangle_fans support.
- zink: For MoltenVk added vkFlushMappedMemoryRanges() to vkMapMemory() to fix empty mapped memory.
- zink: make physical device functions use a dynamic function pointers.
@@ -1705,7 +1705,7 @@ Eric Engestrom (94):
- egl: replace \_EGLDriver with \_EGLDisplay->Driver in \_eglGetSyncAttrib()
- egl: replace replace \_EGLDriver with \_EGLDisplay->Driver in eglapi.c
- egl: drop unused \_EGLDriver from MesaGLInteropEGL{QueryDeviceInfo,ExportObject}()
-- egl: replace \`&_eglDriver`/`NULL\` tested against \`NULL\` with simple \`true`/`false\`
+- egl: replace \`&_eglDriver\`/\`NULL\` tested against \`NULL\` with simple \`true\`/\`false\`
- egl: drop unused ${drv}_driver()
- egl: inline \_eglGetDriverProc() into eglGetProcAddress()
- egl: inline \_eglInitializeDisplay() into eglInitialize()
@@ -1991,7 +1991,7 @@ Guido Günther (1):
Gurchetan Singh (7):
-- virgl: add flags to (*resource_create) callback
+- virgl: add flags to (\*resource_create) callback
- drm-uapi: virtgpu_drm.h: resource create blob + host visible memory region
- virgl/drm: query for resource blob and host visible memory region
- virgl/drm: add resource create blob function
@@ -2173,7 +2173,7 @@ Iago Toral Quiroga (443):
- v3dv: implement vkResetCommandPool
- v3dv: don't swap R/B channels for VK_FORMAT_R5B6G5_UNORM_PACK16
- v3dv: don't use TLB path for formats that are not supported for rendering
-- v3dv: fix image clearing with VK_REMAINING_\*
+- v3dv: fix image clearing with VK_REMAINING\_\*
- v3dv: don't support image formats that we can rendet to or texture from
- v3dv: fix fill buffer with VK_WHOLE_SIZE
- v3dv: implement vkGetRenderAreaGranularity
@@ -2468,7 +2468,7 @@ Ian Romanick (34):
- intel/compiler: Silence unused parameter warning in brw_surface_payload_size
- intel/compiler: Don't fallback to vec4 when scalar GS compile fails \[v2\]
- intel/vec4: Remove inline lowering of LRP
-- intel/compiler: Remove INTEL_SCALAR_... env variables
+- intel/compiler: Remove INTEL_SCALAR\_... env variables
- intel/vec4: Remove all support for Gen8+ \[v2\]
- intel/vec4: Remove everything related to VS_OPCODE_SET_SIMD4X2_HEADER_GEN9
- i965: Allow viewport array extensions with allow_higher_compat_version
@@ -2637,7 +2637,7 @@ Jason Ekstrand (296):
- intel/nir: Allow splitting a single load into up to 32 loads
- clover/spirv: Don't call llvm::regularizeLlvmForSpirv
- clover: Call clang with -O0 for the SPIR-V path
-- nir: Report progress properly in nir_lower_bool_to_\*
+- nir: Report progress properly in nir_lower_bool_to\_\*
- intel/nir: Pass the nir_builder by reference in lower_alpha_to_coverage
- intel/nir: Rewrite the guts of lower_alpha_to_coverage
- intel/nir: Clean up lower_alpha_to_coverage a bit
@@ -2712,7 +2712,7 @@ Jason Ekstrand (296):
- spirv: Run repair_ssa if there are discard instructions
- intel/nir: Call validate_ssa_dominance at both ends of the NIR compile
- nir: More NIR_MAX_VEC_COMPONENTS fixes
-- nir/idiv_const: Use the modern nir_src_as_\* constant helpers
+- nir/idiv_const: Use the modern nir_src_as\_\* constant helpers
- anv: Fix the target_bo assertion in anv_reloc_list_add
- clover: Pull the stride from pipe_transfer for image maps
- spirv: Access qualifiers are not a bitfield
@@ -2833,7 +2833,7 @@ Jason Ekstrand (296):
- nir/opt_find_array_copies: Allow copies from mem_constant
- nir: Add and use some deref mode helpers
- nir/lower_array_deref_of_vec: Use nir_deref_mode_must_be
-- nir/lower_io: Use nir_deref_mode_\* helpers
+- nir/lower_io: Use nir_deref_mode\_\* helpers
- nir/phis_to_scalar,gcm: Use nir_deref_mode_may_be
- nir: Only force loop unrolling if we know it's a in/out/temp
- nir/vars_to_ssa: Use nir_deref_must_be
@@ -2847,7 +2847,7 @@ Jason Ekstrand (296):
- nir/opt_deref: Add a deref mode specialization optimization
- nir/opt_deref: Add an optimization for deref_mode_is
- nir/lower_io: Add a mode parameter to build_addr_iadd
-- nir/lower_io: Add a mode parameter to addr_format_is_\*
+- nir/lower_io: Add a mode parameter to addr_format_is\_\*
- nir/lower_io: Add support for 32/64bit_global for shared
- nir/lower_io: Add support for lowering deref_mode_is
- nir/lower_io: Support generic pointer access
@@ -3270,8 +3270,8 @@ Marcin Ślusarz (50):
- intel/fs,vec4: remove unused assignments
- intel: add INTEL_DEBUG=shaders
- intel/fs: add hint how to get more info when shader validation fails
-- intel/compiler: match brw_compile_\* declarations with their definitions
-- intel/compiler: use the same name for nir shaders in brw_compile_\* functions
+- intel/compiler: match brw_compile\_\* declarations with their definitions
+- intel/compiler: use the same name for nir shaders in brw_compile\_\* functions
- intel/compiler: move extern C functions out of namespace brw
- intel/compiler: print dispatch width when shader fails to compile
- intel/compiler: fix typo in a comment
@@ -3388,8 +3388,8 @@ Marek Olšák (278):
- radeonsi: stop using TGSI_PROPERTY_TES_POINT_MODE / TES_PRIM_MODE
- radeonsi: stop using TGSI_PROPERTY_TES_SPACING
- radeonsi: stop using TGSI_PROPERTY_TES_VERTEX_ORDER_CW
-- radeonsi: stop using TGSI_PROPERTY_GS_\*
-- radeonsi: stop using TGSI_PROPERTY_CS_\*
+- radeonsi: stop using TGSI_PROPERTY_GS\_\*
+- radeonsi: stop using TGSI_PROPERTY_CS\_\*
- radeonsi: stop using TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL
- radeonsi: stop using TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE
- radeonsi: stop using TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
@@ -3400,7 +3400,7 @@ Marek Olšák (278):
- radeonsi: remove redundant si_shader_info::shader_buffers_declared
- radeonsi: remove redundant si_shader_info::images_declared
- radeonsi: remove redundant si_shader_info::const_buffers_declared
-- radeonsi: remove redundant si_shader_info:*(clip|cull)\* fields
+- radeonsi: remove redundant si_shader_info:\*(clip|cull)\* fields
- radeonsi: remove unused si_shader_info::uses_(vertexid|basevertex)
- radeonsi: merge uses_persp_opcode_interp_sample/uses_linear_opcode_interp_sample
- radeonsi: remove redundant si_shader_info::uses_kill
@@ -3439,10 +3439,10 @@ Marek Olšák (278):
- radeonsi: vectorize IO for better ALU vectorization
- radeonsi: don't scalarize 16-bit vec2 ALU opcodes
- radeonsi: add 16-bit ALU vectorization
-- gallium: rename PIPE_TRANSFER_\* -\> PIPE_MAP_\*
+- gallium: rename PIPE_TRANSFER\_\* -\> PIPE_MAP\_\*
- gallium: rename pipe_transfer_usage -\> pipe_map_flags
- gallium: rename transfer flags -\> map flags in comments
-- radeon: rename RADEON_TRANSFER_\* -\> RADEON_MAP_\*
+- radeon: rename RADEON_TRANSFER\_\* -\> RADEON_MAP\_\*
- radeonsi: set TRUNC_COORD=0 for Total War: WARHAMMER to fix it
- radeonsi: move debug options from si_disk_cache_create to si_get_ir_cache_key
- radeonsi: remove KILL_PS_INF_INTERP/CLAMP_DIV_BY_ZERO, use screen::options
@@ -4281,7 +4281,7 @@ Samuel Pitoiset (157):
- radv: ignore BB labels when splitting the disassembly string
- aco: add ACO_DEBUG=force-waitcnt to emit wait-states
- amd/registers: add missing TBA registers on GFX6-GFX8
-- amd/registers: add some SQ_WAVE_\* register definitions
+- amd/registers: add some SQ_WAVE\_\* register definitions
- aco: add TBA/TMA/TTMP0-11 physical registers definitions
- aco: validate that SMEM operands can use fixed registers
- aco: add a helper for building a trap handler shader
@@ -4328,7 +4328,7 @@ Samuel Pitoiset (157):
- nir/lower_memory_model: return progress when visiting instructions
- nir/lower_memory_model: do not break with global atomic operations
- ac/nir: implement nir_intrinsic_{load,store}_global
-- ac/nir: implement nir_intrinsic_global_atomic_\*
+- ac/nir: implement nir_intrinsic_global_atomic\_\*
- radv: lower deref operations for global memory for both backends
- ac/llvm: fix invalid IR if image stores are shrinked using the format
- nir/lower_io: change nir_io_add_const_offset_to_base to use bitfield modes
diff --git a/docs/relnotes/20.3.1.rst b/docs/relnotes/20.3.1.rst
index b6d8b74839b..8e91dffbd90 100644
--- a/docs/relnotes/20.3.1.rst
+++ b/docs/relnotes/20.3.1.rst
@@ -32,7 +32,7 @@ Bug fixes
---------
- Crash and slowness in FreeCAD
-- ci: Missing needs: in radeonsi-stoney-*?
+- ci: Missing needs: in radeonsi-stoney-\*?
- Triangles appear from the center of the field on PES2021 with Mesa 20.2.x
- \[gen9][iris][regression][bisected\] flaky piglit tests
- \[Intel][OpenGL\] Fail to get correct value when sampling from a texture in depth formats.
More information about the mesa-commit
mailing list