Mesa (staging/20.3): aco: don't consider a phi trivial if same's register doesn't match the def

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Module: Mesa
Branch: staging/20.3
Commit: 613251e8519a115af8a8755f31f91f67c44b85e1
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=613251e8519a115af8a8755f31f91f67c44b85e1

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Fri Jan 22 10:47:19 2021 +0000

aco: don't consider a phi trivial if same's register doesn't match the def

For example:
 s2: %688:s[32-33] = p_linear_phi %3:s[10-11], %688:s[32-33]
would have been considered trivial.

This might happen due to parallelcopies when assigning phi registers.

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Fixes: 69b6069dd28 ("aco: refactor try_remove_trivial_phi() in RA")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8645>
(cherry picked from commit 824eba2148e56a75d0678011b4f546cabbd5d345)

---

 .pick_status.json                            | 2 +-
 src/amd/compiler/aco_register_allocation.cpp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index bd83a9acdf3..488ec9aafa7 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -202,7 +202,7 @@
         "description": "aco: don't consider a phi trivial if same's register doesn't match the def",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "69b6069dd288455cdb2655284c592a85d17df273"
     },
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index 5c79c5c9973..79b10ea4cf0 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -1675,7 +1675,7 @@ void try_remove_trivial_phi(ra_ctx& ctx, Temp temp)
          assert(t == same || op.physReg() == def.physReg());
          continue;
       }
-      if (same != Temp())
+      if (same != Temp() || op.physReg() != def.physReg())
          return;
 
       same = t;