Mesa (master): anv: Break SAMPLE_PATTERN and MULTISAMPLE emit into helpers

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Module: Mesa
Branch: master
Commit: a02891fdfd358d074a1efd81819a11949dc90140
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a02891fdfd358d074a1efd81819a11949dc90140

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Mar 14 18:02:49 2019 -0500

anv: Break SAMPLE_PATTERN and MULTISAMPLE emit into helpers

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1887>

---

 src/intel/vulkan/anv_genX.h      |  4 +++
 src/intel/vulkan/genX_pipeline.c | 42 ++-----------------------
 src/intel/vulkan/genX_state.c    | 68 +++++++++++++++++++++++++++++++++-------
 3 files changed, 63 insertions(+), 51 deletions(-)

diff --git a/src/intel/vulkan/anv_genX.h b/src/intel/vulkan/anv_genX.h
index 65af516d3e9..e69c641a93a 100644
--- a/src/intel/vulkan/anv_genX.h
+++ b/src/intel/vulkan/anv_genX.h
@@ -97,6 +97,10 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
                      const unsigned entry_size[4],
                      enum gen_urb_deref_block_size *deref_block_size);
 
+void genX(emit_multisample)(struct anv_batch *batch, uint32_t samples);
+
+void genX(emit_sample_pattern)(struct anv_batch *batch);
+
 void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
                                 struct anv_address dst, struct anv_address src,
                                 uint32_t size);
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 6fb16b0536e..06dabad6464 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -736,8 +736,9 @@ static void
 emit_ms_state(struct anv_graphics_pipeline *pipeline,
               const VkPipelineMultisampleStateCreateInfo *info)
 {
-   uint32_t samples = 1;
-   uint32_t log2_samples = 0;
+   uint32_t samples = info ? info->rasterizationSamples : 1;
+
+   genX(emit_multisample)(&pipeline->base.batch, samples);
 
    /* From the Vulkan 1.0 spec:
     *    If pSampleMask is NULL, it is treated as if the mask has all bits
@@ -751,46 +752,9 @@ emit_ms_state(struct anv_graphics_pipeline *pipeline,
    uint32_t sample_mask = 0xff;
 #endif
 
-   if (info) {
-      samples = info->rasterizationSamples;
-      log2_samples = __builtin_ffs(samples) - 1;
-   }
-
    if (info && info->pSampleMask)
       sample_mask &= info->pSampleMask[0];
 
-   anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_MULTISAMPLE), ms) {
-      ms.NumberofMultisamples       = log2_samples;
-
-      ms.PixelLocation              = CENTER;
-#if GEN_GEN >= 8
-      /* The PRM says that this bit is valid only for DX9:
-       *
-       *    SW can choose to set this bit only for DX9 API. DX10/OGL API's
-       *    should not have any effect by setting or not setting this bit.
-       */
-      ms.PixelPositionOffsetEnable  = false;
-#else
-
-      switch (samples) {
-      case 1:
-         GEN_SAMPLE_POS_1X(ms.Sample);
-         break;
-      case 2:
-         GEN_SAMPLE_POS_2X(ms.Sample);
-         break;
-      case 4:
-         GEN_SAMPLE_POS_4X(ms.Sample);
-         break;
-      case 8:
-         GEN_SAMPLE_POS_8X(ms.Sample);
-         break;
-      default:
-         break;
-      }
-#endif
-   }
-
    anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_SAMPLE_MASK), sm) {
       sm.SampleMask = sample_mask;
    }
diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index e490c40f07c..d944df2ed5d 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -156,18 +156,7 @@ genX(init_device_state)(struct anv_device *device)
 #if GEN_GEN >= 8
    anv_batch_emit(&batch, GENX(3DSTATE_WM_CHROMAKEY), ck);
 
-   /* See the Vulkan 1.0 spec Table 24.1 "Standard sample locations" and
-    * VkPhysicalDeviceFeatures::standardSampleLocations.
-    */
-   anv_batch_emit(&batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) {
-      GEN_SAMPLE_POS_1X(sp._1xSample);
-      GEN_SAMPLE_POS_2X(sp._2xSample);
-      GEN_SAMPLE_POS_4X(sp._4xSample);
-      GEN_SAMPLE_POS_8X(sp._8xSample);
-#if GEN_GEN >= 9
-      GEN_SAMPLE_POS_16X(sp._16xSample);
-#endif
-   }
+   genX(emit_sample_pattern)(&batch);
 
    /* The BDW+ docs describe how to use the 3DSTATE_WM_HZ_OP instruction in the
     * section titled, "Optimized Depth Buffer Clear and/or Stencil Buffer
@@ -320,6 +309,61 @@ genX(init_device_state)(struct anv_device *device)
    return anv_queue_submit_simple_batch(&device->queue, &batch);
 }
 
+void
+genX(emit_multisample)(struct anv_batch *batch, uint32_t samples)
+{
+   anv_batch_emit(batch, GENX(3DSTATE_MULTISAMPLE), ms) {
+      ms.NumberofMultisamples       = __builtin_ffs(samples) - 1;
+
+      ms.PixelLocation              = CENTER;
+#if GEN_GEN >= 8
+      /* The PRM says that this bit is valid only for DX9:
+       *
+       *    SW can choose to set this bit only for DX9 API. DX10/OGL API's
+       *    should not have any effect by setting or not setting this bit.
+       */
+      ms.PixelPositionOffsetEnable  = false;
+#else
+
+      switch (samples) {
+      case 1:
+         GEN_SAMPLE_POS_1X(ms.Sample);
+         break;
+      case 2:
+         GEN_SAMPLE_POS_2X(ms.Sample);
+         break;
+      case 4:
+         GEN_SAMPLE_POS_4X(ms.Sample);
+         break;
+      case 8:
+         GEN_SAMPLE_POS_8X(ms.Sample);
+         break;
+      default:
+         break;
+      }
+#endif
+   }
+}
+
+#if GEN_GEN >= 8
+void
+genX(emit_sample_pattern)(struct anv_batch *batch)
+{
+   /* See the Vulkan 1.0 spec Table 24.1 "Standard sample locations" and
+    * VkPhysicalDeviceFeatures::standardSampleLocations.
+    */
+   anv_batch_emit(batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) {
+      GEN_SAMPLE_POS_1X(sp._1xSample);
+      GEN_SAMPLE_POS_2X(sp._2xSample);
+      GEN_SAMPLE_POS_4X(sp._4xSample);
+      GEN_SAMPLE_POS_8X(sp._8xSample);
+#if GEN_GEN >= 9
+      GEN_SAMPLE_POS_16X(sp._16xSample);
+#endif
+   }
+}
+#endif
+
 static uint32_t
 vk_to_gen_tex_filter(VkFilter filter, bool anisotropyEnable)
 {