Mesa (master): intel/fs: Add an ex_desc field to fs_inst for SHADER_OPCODE_SEND

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Module: Mesa
Branch: master
Commit: f3a43e36e016b296312cfa5dcc19042c12e4e5e7
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3a43e36e016b296312cfa5dcc19042c12e4e5e7

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Jan 27 15:28:24 2021 -0600

intel/fs: Add an ex_desc field to fs_inst for SHADER_OPCODE_SEND

I meant to do this years ago when I first added SHADER_OPCODE_SEND.  At
the time, the only use for the extended descriptor was bindless handles
which were always one thing and never non-constant.  However, it doesn't
actually require any extra instructions because we have to OR in ex_mlen
anyway.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8748>

---

 src/intel/compiler/brw_eu_emit.c        | 3 ++-
 src/intel/compiler/brw_fs.cpp           | 7 ++++---
 src/intel/compiler/brw_fs_generator.cpp | 3 ++-
 src/intel/compiler/brw_ir.h             | 1 +
 4 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index bac3e7f0892..939fd60d3d4 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -2730,7 +2730,8 @@ brw_send_indirect_split_message(struct brw_codegen *p,
    }
 
    if (ex_desc.file == BRW_IMMEDIATE_VALUE &&
-       (devinfo->gen >= 12 || (ex_desc.ud & INTEL_MASK(15, 12)) == 0)) {
+       (devinfo->gen >= 12 ||
+        ((ex_desc.ud | ex_desc_imm) & INTEL_MASK(15, 12)) == 0)) {
       ex_desc.ud |= ex_desc_imm;
    } else {
       const struct tgl_swsb swsb = brw_get_default_swsb(p);
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 35772fc87dc..22f8b5f12b3 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -4647,7 +4647,6 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
       load->dst = payload;
 
       uint32_t msg_ctl = brw_fb_write_msg_control(inst, prog_data);
-      uint32_t ex_desc = 0;
 
       inst->desc =
          (inst->group / 16) << 11 | /* rt slot group */
@@ -4655,6 +4654,7 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
                            GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE,
                            inst->last_rt, false);
 
+      uint32_t ex_desc = 0;
       if (devinfo->gen >= 11) {
          /* Set the "Render Target Index" and "Src0 Alpha Present" fields
           * in the extended message descriptor, in lieu of using a header.
@@ -4664,12 +4664,13 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
          if (key->nr_color_regions == 0)
             ex_desc |= 1 << 20; /* Null Render Target */
       }
+      inst->ex_desc = ex_desc;
 
       inst->opcode = SHADER_OPCODE_SEND;
       inst->resize_sources(3);
       inst->sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
-      inst->src[0] = brw_imm_ud(inst->desc);
-      inst->src[1] = brw_imm_ud(ex_desc);
+      inst->src[0] = brw_imm_ud(0);
+      inst->src[1] = brw_imm_ud(0);
       inst->src[2] = payload;
       inst->mlen = regs_written(load);
       inst->ex_mlen = 0;
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index a129db198b6..0a9bd482427 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -331,7 +331,8 @@ fs_generator::generate_send(fs_inst *inst,
    uint32_t desc_imm = inst->desc |
       brw_message_desc(devinfo, inst->mlen, rlen, inst->header_size);
 
-   uint32_t ex_desc_imm = brw_message_ex_desc(devinfo, inst->ex_mlen);
+   uint32_t ex_desc_imm = inst->ex_desc |
+      brw_message_ex_desc(devinfo, inst->ex_mlen);
 
    if (ex_desc.file != BRW_IMMEDIATE_VALUE || ex_desc.ud || ex_desc_imm) {
       /* If we have any sort of extended descriptor, then we need SENDS.  This
diff --git a/src/intel/compiler/brw_ir.h b/src/intel/compiler/brw_ir.h
index a548eb393a0..01f81feddb4 100644
--- a/src/intel/compiler/brw_ir.h
+++ b/src/intel/compiler/brw_ir.h
@@ -152,6 +152,7 @@ struct backend_instruction {
    uint8_t target; /**< MRT target. */
    uint8_t sfid; /**< SFID for SEND instructions */
    uint32_t desc; /**< SEND[S] message descriptor immediate */
+   uint32_t ex_desc; /**< SEND[S] extended message descriptor immediate */
    unsigned size_written; /**< Data written to the destination register in bytes. */
 
    enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */