Mesa (main): nir/ifind_msb_rev: fix input check

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: ffea62260415c9e1b5c8fa076ac0285c0145447e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ffea62260415c9e1b5c8fa076ac0285c0145447e

Author: Thomas H.P. Andersen <phomes at gmail.com>
Date:   Tue Jun 29 00:54:40 2021 +0200

nir/ifind_msb_rev: fix input check

ifind_msb_rev was introduced in a5747f8ab357ff00c630b937b221e5fb59d90289.

ifind_msb_rev guards against src0 being both 0 or -1 at the same time.
That is always true. This patch changes it to check for those values
individually.

Spotted from a compile warning.

Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>

Fixes: a5747f8ab35 (\"nir: add opcodes for *find_msb_rev and lowering\")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11630>

---

 src/compiler/nir/nir_opcodes.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 9202a2e5398..832b6215222 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -489,7 +489,7 @@ for (int bit = 31; bit >= 0; bit--) {
 
 unop_convert("ifind_msb_rev", tint32, tuint, """
 dst = -1;
-if (src0 != 0 || src0 != -1) {
+if (src0 != 0 && src0 != -1) {
    for (int bit = 0; bit < 31; bit++) {
       /* If src0 < 0, we're looking for the first 0 bit.
        * if src0 >= 0, we're looking for the first 1 bit.