Mesa (main): radv: emit NOT_EOP for multi indexed draws

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Module: Mesa
Branch: main
Commit: 00206b1664387effca02f28c0923de2560e6b59f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=00206b1664387effca02f28c0923de2560e6b59f

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Tue Mar 30 16:17:09 2021 -0400

radv: emit NOT_EOP for multi indexed draws

this is never emitted currently because drawCount is always 1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11532>

---

 src/amd/vulkan/radv_cmd_buffer.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 7d4c6acec12..32c8561c8b8 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -5252,14 +5252,18 @@ radv_cs_emit_draw_packet(struct radv_cmd_buffer *cmd_buffer, uint32_t vertex_cou
  */
 static void
 radv_cs_emit_draw_indexed_packet(struct radv_cmd_buffer *cmd_buffer, uint64_t index_va,
-                                 uint32_t max_index_count, uint32_t index_count)
+                                 uint32_t max_index_count, uint32_t index_count, bool not_eop)
 {
    radeon_emit(cmd_buffer->cs, PKT3(PKT3_DRAW_INDEX_2, 4, cmd_buffer->state.predicating));
    radeon_emit(cmd_buffer->cs, max_index_count);
    radeon_emit(cmd_buffer->cs, index_va);
    radeon_emit(cmd_buffer->cs, index_va >> 32);
    radeon_emit(cmd_buffer->cs, index_count);
-   radeon_emit(cmd_buffer->cs, V_0287F0_DI_SRC_SEL_DMA);
+   /* NOT_EOP allows merging multiple draws into 1 wave, but only user VGPRs
+    * can be changed between draws and GS fast launch must be disabled.
+    * NOT_EOP doesn't work on gfx9 and older.
+    */
+   radeon_emit(cmd_buffer->cs, V_0287F0_DI_SRC_SEL_DMA | S_0287F0_NOT_EOP(not_eop));
 }
 
 /* MUST inline this function to avoid massive perf loss in drawoverhead */
@@ -5367,6 +5371,7 @@ radv_emit_draw_packets_indexed(struct radv_cmd_buffer *cmd_buffer,
    struct radeon_cmdbuf *cs = cmd_buffer->cs;
    const int index_size = radv_get_vgt_index_size(state->index_type);
    unsigned i = 0;
+   const bool uses_drawid = state->pipeline->graphics.uses_drawid;
 
    if (vertexOffset) {
       radv_emit_userdata_vertex(cmd_buffer, info, *vertexOffset);
@@ -5381,12 +5386,12 @@ radv_emit_draw_packets_indexed(struct radv_cmd_buffer *cmd_buffer,
          const uint64_t index_va = state->index_va + draw->firstIndex * index_size;
 
          if (!state->subpass->view_mask) {
-            radv_cs_emit_draw_indexed_packet(cmd_buffer, index_va, remaining_indexes, draw->indexCount);
+            radv_cs_emit_draw_indexed_packet(cmd_buffer, index_va, remaining_indexes, draw->indexCount, !uses_drawid && i < drawCount - 1);
          } else {
             u_foreach_bit(view, state->subpass->view_mask) {
                radv_emit_view_index(cmd_buffer, view);
 
-               radv_cs_emit_draw_indexed_packet(cmd_buffer, index_va, remaining_indexes, draw->indexCount);
+               radv_cs_emit_draw_indexed_packet(cmd_buffer, index_va, remaining_indexes, draw->indexCount, false);
             }
          }
       }
@@ -5399,6 +5404,8 @@ radv_emit_draw_packets_indexed(struct radv_cmd_buffer *cmd_buffer,
              cmd_buffer->device->physical_device->rad_info.has_zero_index_buffer_bug)
             continue;
 
+         const VkMultiDrawIndexedInfoEXT *next = (void*)(i < drawCount - 1 ? ((uint8_t*)draw + stride) : NULL);
+         const bool offset_changes = next && next->vertexOffset != draw->vertexOffset;
          if (i > 0) {
             if (state->last_vertex_offset != draw->vertexOffset) {
                radeon_set_sh_reg(cs, state->pipeline->graphics.vtx_base_sgpr, draw->vertexOffset);
@@ -5411,12 +5418,12 @@ radv_emit_draw_packets_indexed(struct radv_cmd_buffer *cmd_buffer,
          const uint64_t index_va = state->index_va + draw->firstIndex * index_size;
 
          if (!state->subpass->view_mask) {
-            radv_cs_emit_draw_indexed_packet(cmd_buffer, index_va, remaining_indexes, draw->indexCount);
+            radv_cs_emit_draw_indexed_packet(cmd_buffer, index_va, remaining_indexes, draw->indexCount, !offset_changes && !uses_drawid && i < drawCount - 1);
          } else {
             u_foreach_bit(view, state->subpass->view_mask) {
                radv_emit_view_index(cmd_buffer, view);
 
-               radv_cs_emit_draw_indexed_packet(cmd_buffer, index_va, remaining_indexes, draw->indexCount);
+               radv_cs_emit_draw_indexed_packet(cmd_buffer, index_va, remaining_indexes, draw->indexCount, false);
             }
          }
       }