Mesa (main): asahi: Use XML for interpolation packet

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Module: Mesa
Branch: main
Commit: 01174fcec879212380bbf49b068cf466d15af6e6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=01174fcec879212380bbf49b068cf466d15af6e6

Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date:   Mon Jul  5 23:17:33 2021 -0400

asahi: Use XML for interpolation packet

Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>

---

 src/asahi/lib/cmdbuf.xml              |  5 +++++
 src/gallium/drivers/asahi/agx_state.c | 14 +++++++-------
 2 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/src/asahi/lib/cmdbuf.xml b/src/asahi/lib/cmdbuf.xml
index 8dee43da472..e068b7b0d8a 100644
--- a/src/asahi/lib/cmdbuf.xml
+++ b/src/asahi/lib/cmdbuf.xml
@@ -307,6 +307,11 @@
     <field name="Front face CCW" size="1" start="1:16" type="bool"/>
   </struct>
 
+  <struct name="Interpolation" size="20">
+    <field name="Tag" size="32" start="0:0" type="hex" default="0x100C0000"/>
+    <field name="Varying count" size="32" start="1:0" type="uint"/>
+  </struct>
+
   <struct name="Linkage" size="16">
     <field name="Tag" size="32" start="0:0" type="hex" default="0xC020000"/>
     <field name="Unk 1" size="32" start="1:0" type="hex" default="0x100"/>
diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index 082337ea480..e1af6c21b89 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -1296,15 +1296,15 @@ demo_launch_fragment(struct agx_context *ctx, struct agx_pool *pool, uint32_t pi
 }
 
 static uint64_t
-demo_unk8(struct agx_compiled_shader *fs, struct agx_pool *pool)
+demo_interpolation(struct agx_compiled_shader *fs, struct agx_pool *pool)
 {
-   /* Varying related */
-   uint32_t unk[] = {
-      /* interpolated count */
-      0x100c0000, fs->info.varyings.nr_slots, 0x0, 0x0, 0x0,
+   struct agx_ptr t = agx_pool_alloc_aligned(pool, AGX_INTERPOLATION_LENGTH, 64);
+
+   agx_pack(t.cpu, INTERPOLATION, cfg) {
+      cfg.varying_count = fs->info.varyings.nr_slots;
    };
 
-   return agx_pool_upload(pool, unk, sizeof(unk));
+   return t.gpu;
 }
 
 static uint64_t
@@ -1435,7 +1435,7 @@ agx_encode_state(struct agx_context *ctx, uint8_t *out,
    bool reads_tib = ctx->fs->info.reads_tib;
 
    agx_push_record(&out, 0, zero.gpu);
-   agx_push_record(&out, 5, demo_unk8(ctx->fs, pool));
+   agx_push_record(&out, 5, demo_interpolation(ctx->fs, pool));
    agx_push_record(&out, 5, demo_launch_fragment(ctx, pool, pipeline_fragment, varyings, ctx->fs->info.varyings.nr_descs));
    agx_push_record(&out, 4, demo_linkage(ctx->vs, pool));
    agx_push_record(&out, 7, demo_rasterizer(ctx, pool));