Mesa (main): asahi: Prepack rasterizer faces

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Tue Jul 6 13:55:47 UTC 2021


Module: Mesa
Branch: main
Commit: dc968a9bec967db545bfe12ff62e9b2d65a5be4b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc968a9bec967db545bfe12ff62e9b2d65a5be4b

Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date:   Mon Jul  5 16:00:45 2021 -0400

asahi: Prepack rasterizer faces

A bit more efficient and will allow easy implementation of the stencil test.

Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>

---

 src/asahi/lib/cmdbuf.xml              |  6 ++---
 src/gallium/drivers/asahi/agx_state.c | 45 +++++++++++++++++++++++++++--------
 src/gallium/drivers/asahi/agx_state.h |  3 +--
 3 files changed, 39 insertions(+), 15 deletions(-)

diff --git a/src/asahi/lib/cmdbuf.xml b/src/asahi/lib/cmdbuf.xml
index 3f836b84937..dffbc1fafb5 100644
--- a/src/asahi/lib/cmdbuf.xml
+++ b/src/asahi/lib/cmdbuf.xml
@@ -273,10 +273,10 @@
   <struct name="Rasterizer face" size="8">
     <field name="Stencil reference" size="8" start="0:0" type="hex" default="0x00"/>
     <!-- line width is 4:4 fixed point with off-by-one applied -->
-    <field name="Line width" size="8" start="0:8" type="hex" default="0xF"/>
-    <field name="Polygon mode" size="2" start="0:18" type="Polygon Mode" default="Fill"/>
+    <field name="Line width" size="8" start="0:8" type="hex"/>
+    <field name="Polygon mode" size="2" start="0:18" type="Polygon Mode"/>
     <field name="Disable depth write" size="1" start="0:21" type="bool"/>
-    <field name="Depth function" size="3" start="0:24" type="ZS Func" default="Always"/>
+    <field name="Depth function" size="3" start="0:24" type="ZS Func"/>
     <field name="Stencil write mask" size="8" start="1:0" type="hex" default="0xFF"/>
     <field name="Stencil read mask" size="8" start="1:8" type="hex" default="0xFF"/>
     <field name="Depth pass" size="3" start="1:16" type="Stencil Op"/>
diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index 4111eb2178d..aa16ffdfc34 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -170,6 +170,17 @@ agx_bind_blend_state(struct pipe_context *pctx, void *cso)
    ctx->blend = cso;
 }
 
+static void
+agx_pack_rasterizer_face(struct agx_rasterizer_face_packed *out,
+                         enum agx_zs_func z_func,
+                         bool disable_z_write)
+{
+   agx_pack(out, RASTERIZER_FACE, cfg) {
+      cfg.depth_function = z_func;
+      cfg.disable_depth_write = disable_z_write;
+   }
+}
+
 static void *
 agx_create_zsa_state(struct pipe_context *ctx,
                      const struct pipe_depth_stencil_alpha_state *state)
@@ -178,7 +189,6 @@ agx_create_zsa_state(struct pipe_context *ctx,
    assert(!state->depth_bounds_test && "todo");
 
    so->base = *state;
-   so->disable_z_write = !state->depth_writemask;
 
    /* Z func can be used as-is */
    STATIC_ASSERT((enum agx_zs_func) PIPE_FUNC_NEVER    == AGX_ZS_FUNC_NEVER);
@@ -190,9 +200,20 @@ agx_create_zsa_state(struct pipe_context *ctx,
    STATIC_ASSERT((enum agx_zs_func) PIPE_FUNC_GEQUAL   == AGX_ZS_FUNC_GEQUAL);
    STATIC_ASSERT((enum agx_zs_func) PIPE_FUNC_ALWAYS   == AGX_ZS_FUNC_ALWAYS);
 
-   so->z_func = state->depth_enabled ?
+   enum agx_zs_func z_func = state->depth_enabled ?
                 ((enum agx_zs_func) state->depth_func) : AGX_ZS_FUNC_ALWAYS;
 
+   agx_pack_rasterizer_face(&so->front,
+         z_func, !state->depth_writemask);
+
+   if (state->stencil[1].enabled) {
+      agx_pack_rasterizer_face(&so->back,
+            z_func, !state->depth_writemask);
+   } else {
+      /* One sided stencil */
+      so->back = so->front;
+   }
+
    return so;
 }
 
@@ -1270,17 +1291,13 @@ demo_linkage(struct agx_compiled_shader *vs, struct agx_pool *pool)
 static uint64_t
 demo_rasterizer(struct agx_context *ctx, struct agx_pool *pool)
 {
-   struct agx_ptr t = agx_pool_alloc_aligned(pool, AGX_RASTERIZER_LENGTH, 64);
    struct agx_rasterizer *rast = ctx->rast;
+   struct agx_rasterizer_packed out;
 
-   agx_pack(t.cpu, RASTERIZER, cfg) {
-      cfg.front.depth_function = ctx->zs.z_func;
-      cfg.back.depth_function = ctx->zs.z_func;
+   agx_pack(&out, RASTERIZER, cfg) {
 
       cfg.front.line_width = cfg.back.line_width = rast->line_width;
-
-      cfg.front.disable_depth_write = ctx->zs.disable_z_write;
-      cfg.back.disable_depth_write = ctx->zs.disable_z_write;
+      cfg.front.polygon_mode = cfg.back.polygon_mode = AGX_POLYGON_MODE_FILL;
 
       /* Always enable scissoring so we may scissor to the viewport (TODO:
        * optimize this out if the viewport is the default and the app does not
@@ -1288,7 +1305,15 @@ demo_rasterizer(struct agx_context *ctx, struct agx_pool *pool)
       cfg.scissor_enable = true;
    };
 
-   return t.gpu;
+   /* Words 2-3: front */
+   out.opaque[2] |= ctx->zs.front.opaque[0];
+   out.opaque[3] |= ctx->zs.front.opaque[1];
+
+   /* Words 4-5: back */
+   out.opaque[4] |= ctx->zs.back.opaque[0];
+   out.opaque[5] |= ctx->zs.back.opaque[1];
+
+   return agx_pool_upload_aligned(pool, &out, sizeof(out), 64);
 }
 
 static uint64_t
diff --git a/src/gallium/drivers/asahi/agx_state.h b/src/gallium/drivers/asahi/agx_state.h
index 9ecb371dea1..ec143f8596d 100644
--- a/src/gallium/drivers/asahi/agx_state.h
+++ b/src/gallium/drivers/asahi/agx_state.h
@@ -117,8 +117,7 @@ struct agx_batch {
 
 struct agx_zsa {
    struct pipe_depth_stencil_alpha_state base;
-   enum agx_zs_func z_func;
-   bool disable_z_write;
+   struct agx_rasterizer_face_packed front, back;
 };
 
 struct agx_blend {



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