Mesa (main): agx: Ensure we don't overallocate registers

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Jul 7 03:41:58 UTC 2021


Module: Mesa
Branch: main
Commit: 1d0008734c80412441e926444203a47a66ec99fc
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d0008734c80412441e926444203a47a66ec99fc

Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date:   Tue Jul  6 22:11:31 2021 -0400

agx: Ensure we don't overallocate registers

Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>

---

 src/asahi/compiler/agx_compile.c           |  1 +
 src/asahi/compiler/agx_compiler.h          |  3 +++
 src/asahi/compiler/agx_register_allocate.c | 10 +++++-----
 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c
index b4af0bd8f23..e6aa627a846 100644
--- a/src/asahi/compiler/agx_compile.c
+++ b/src/asahi/compiler/agx_compile.c
@@ -1366,6 +1366,7 @@ agx_compile_shader_nir(nir_shader *nir,
          ctx->nir_regalloc[reg->index] = nir_regalloc;
       }
 
+      ctx->max_register = nir_regalloc;
       ctx->alloc += func->impl->ssa_alloc;
       emit_cf_list(ctx, &func->impl->body);
       break; /* TODO: Multi-function shaders */
diff --git a/src/asahi/compiler/agx_compiler.h b/src/asahi/compiler/agx_compiler.h
index 2b8b7e1406a..1da1668878d 100644
--- a/src/asahi/compiler/agx_compiler.h
+++ b/src/asahi/compiler/agx_compiler.h
@@ -363,6 +363,9 @@ typedef struct {
     * driver. YOLO the mapping of nir_register to fixed hardware registers */
    unsigned *nir_regalloc;
 
+   /* We reserve the top (XXX: that hurts thread count) */
+   unsigned max_register;
+
    /* Place to start pushing new values */
    unsigned push_base;
 
diff --git a/src/asahi/compiler/agx_register_allocate.c b/src/asahi/compiler/agx_register_allocate.c
index 0f1acdc7c57..1d347aca081 100644
--- a/src/asahi/compiler/agx_register_allocate.c
+++ b/src/asahi/compiler/agx_register_allocate.c
@@ -73,9 +73,9 @@ agx_write_registers(agx_instr *I, unsigned d)
 }
 
 static unsigned
-agx_assign_regs(BITSET_WORD *used_regs, unsigned count, unsigned align)
+agx_assign_regs(BITSET_WORD *used_regs, unsigned count, unsigned align, unsigned max)
 {
-   for (unsigned reg = 0; reg < AGX_NUM_REGS; reg += align) {
+   for (unsigned reg = 0; reg < max; reg += align) {
       bool conflict = false;
 
       for (unsigned j = 0; j < count; ++j)
@@ -95,7 +95,7 @@ agx_assign_regs(BITSET_WORD *used_regs, unsigned count, unsigned align)
 /** Assign registers to SSA values in a block. */
 
 static void
-agx_ra_assign_local(agx_block *block, uint8_t *ssa_to_reg)
+agx_ra_assign_local(agx_block *block, uint8_t *ssa_to_reg, unsigned max_reg)
 {
    BITSET_DECLARE(used_regs, AGX_NUM_REGS) = { 0 };
 
@@ -125,7 +125,7 @@ agx_ra_assign_local(agx_block *block, uint8_t *ssa_to_reg)
          if (I->dest[d].type == AGX_INDEX_NORMAL) {
             unsigned count = agx_write_registers(I, d);
             unsigned align = (I->dest[d].size == AGX_SIZE_16) ? 1 : 2;
-            unsigned reg = agx_assign_regs(used_regs, count, align);
+            unsigned reg = agx_assign_regs(used_regs, count, align, max_reg);
 
             ssa_to_reg[I->dest[d].value] = reg;
          }
@@ -144,7 +144,7 @@ agx_ra(agx_context *ctx)
    agx_compute_liveness(ctx);
    uint8_t *ssa_to_reg = calloc(ctx->alloc, sizeof(uint8_t));
    agx_foreach_block(ctx, block)
-      agx_ra_assign_local(block, ssa_to_reg);
+      agx_ra_assign_local(block, ssa_to_reg, ctx->max_register);
 
    /* TODO: Coalesce combines */
 



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