Mesa (main): intel/eu: Start validating LSC message descriptors

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Module: Mesa
Branch: main
Commit: a62973580b7846f2213cbd2589e9473c26596683
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a62973580b7846f2213cbd2589e9473c26596683

Author: Jason Ekstrand <jason at jlekstrand.net>
Date:   Wed Jun 30 10:27:27 2021 -0500

intel/eu: Start validating LSC message descriptors

This is certainly not a full validation but it at least gets the
framework in place and validates one hard-to-find restriction.

Reviewed-by: Sagar Ghuge <sagar.ghuge at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11657>

---

 src/intel/compiler/brw_eu_validate.c | 39 ++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index 2cbeaf3ec52..fe4c9b29443 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -2028,6 +2028,44 @@ instruction_restrictions(const struct intel_device_info *devinfo,
    return error_msg;
 }
 
+static struct string
+send_descriptor_restrictions(const struct intel_device_info *devinfo,
+                             const brw_inst *inst)
+{
+   struct string error_msg = { .str = NULL, .len = 0 };
+
+   if (inst_is_split_send(devinfo, inst)) {
+      /* We can only validate immediate descriptors */
+      if (brw_inst_send_sel_reg32_desc(devinfo, inst))
+         return error_msg;
+   } else if (inst_is_send(devinfo, inst)) {
+      /* We can only validate immediate descriptors */
+      if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE)
+         return error_msg;
+   } else {
+      return error_msg;
+   }
+
+   const uint32_t desc = brw_inst_send_desc(devinfo, inst);
+
+   switch (brw_inst_sfid(devinfo, inst)) {
+   case GFX12_SFID_TGM:
+   case GFX12_SFID_SLM:
+   case GFX12_SFID_UGM:
+      ERROR_IF(!devinfo->has_lsc, "Platform does not support LSC");
+
+      ERROR_IF(lsc_msg_desc_transpose(devinfo, desc) &&
+               brw_inst_exec_size(devinfo, inst) != BRW_EXECUTE_1,
+               "Transposed vectors are restricted to Exec_Mask = 1.");
+      break;
+
+   default:
+      break;
+   }
+
+   return error_msg;
+}
+
 bool
 brw_validate_instruction(const struct intel_device_info *devinfo,
                          const brw_inst *inst, int offset,
@@ -2051,6 +2089,7 @@ brw_validate_instruction(const struct intel_device_info *devinfo,
          CHECK(vector_immediate_restrictions);
          CHECK(special_requirements_for_handling_double_precision_data_types);
          CHECK(instruction_restrictions);
+         CHECK(send_descriptor_restrictions);
       }
    }