Mesa (staging/21.2): llvmpipe: fix nir dot products (fsum op)

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Module: Mesa
Branch: staging/21.2
Commit: fdc5858caf7bb5efd765463f96a4447bb561767c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fdc5858caf7bb5efd765463f96a4447bb561767c

Author: Roland Scheidegger <sroland at vmware.com>
Date:   Mon Jul 26 16:55:10 2021 +0200

llvmpipe: fix nir dot products (fsum op)

When the dot product uses a source which can be optimized to a scalar,
after a bunch of nir optimization steps the source to fsum will be a scalar
with a x replicate swizzle. Hence nir_src_num_components is just 1 and the
fsum was just a no-op which is not correct. Arguably this could be optimized
a bit better, but just determine the number of addends by using nir_op_infos
instead (the operand fetch was fixed already by 39a938ecf41b doing the same).

Fixes: 4eb0475b5a00 ("gallivm/nir: add fsum support")
Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
Reviewed-by: Brian Paul <brianp at vmware.com>
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12066>
(cherry picked from commit cac5711d433fa1519be101ad3dae1e1d53c9a55a)

---

 .pick_status.json                          | 2 +-
 src/gallium/auxiliary/gallivm/lp_bld_nir.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index b6a4f8bc98b..e83f24d486e 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -301,7 +301,7 @@
         "description": "llvmpipe: fix nir dot products (fsum op)",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "4eb0475b5a0047e368129550e4c07a450a233a74"
     },
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
index e144ccd7a88..6795090053e 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
@@ -1021,7 +1021,7 @@ static void visit_alu(struct lp_build_nir_context *bld_base, const nir_alu_instr
          result[i] = cast_type(bld_base, src[i], nir_op_infos[instr->op].input_types[i], src_bit_size[i]);
       }
    } else if (instr->op == nir_op_fsum4 || instr->op == nir_op_fsum3 || instr->op == nir_op_fsum2) {
-      for (unsigned c = 0; c < nir_src_num_components(instr->src[0].src); c++) {
+      for (unsigned c = 0; c < nir_op_infos[instr->op].input_sizes[0]; c++) {
          LLVMValueRef temp_chan = LLVMBuildExtractValue(gallivm->builder,
                                                           src[0], c, "");
          temp_chan = cast_type(bld_base, temp_chan, nir_op_infos[instr->op].input_types[0], src_bit_size[0]);