Mesa (staging/21.2): pan/bi: Restrict swizzles on same cycle temporaries
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Fri Jul 30 17:14:47 UTC 2021
Module: Mesa
Branch: staging/21.2
Commit: 2ca05ac2939290b5b541f7c1633d920c4f6092e6
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ca05ac2939290b5b541f7c1633d920c4f6092e6
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jul 29 14:26:08 2021 -0400
pan/bi: Restrict swizzles on same cycle temporaries
Hand typed. We could generate this from the XML to avoid the repititon
but I think the cure is worse than the disease.
This fixes instruction encoding faults seen in conformance tests.
Only a single shader-db affected, and it was likely already broken...
quadwords HURT: shaders/glmark/22-1.shader_test MESA_SHADER_FRAGMENT: 133 -> 135 (1.50%)
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12114>
(cherry picked from commit 2cdf95703a816f9dfe4a2bc282caee21ddd94970)
Conflicts:
src/panfrost/bifrost/bi_schedule.c
---
.pick_status.json | 2 +-
src/panfrost/bifrost/bi_schedule.c | 71 ++++++++++++++++++++++++++++++++++++++
2 files changed, 72 insertions(+), 1 deletion(-)
diff --git a/.pick_status.json b/.pick_status.json
index 632dda4ae1a..b3eb881900c 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -238,7 +238,7 @@
"description": "pan/bi: Restrict swizzles on same cycle temporaries",
"nominated": true,
"nomination_type": 0,
- "resolution": 0,
+ "resolution": 1,
"main_sha": null,
"because_sha": null
},
diff --git a/src/panfrost/bifrost/bi_schedule.c b/src/panfrost/bifrost/bi_schedule.c
index 225eeab5fa6..bdfbae7e012 100644
--- a/src/panfrost/bifrost/bi_schedule.c
+++ b/src/panfrost/bifrost/bi_schedule.c
@@ -624,6 +624,72 @@ bi_reads_temps(bi_instr *ins, unsigned src)
}
}
+static bool
+bi_impacted_t_modifiers(bi_instr *I, unsigned src)
+{
+ enum bi_swizzle swizzle = I->src[src].swizzle;
+
+ switch (I->op) {
+ case BI_OPCODE_F16_TO_F32:
+ case BI_OPCODE_F16_TO_S32:
+ case BI_OPCODE_F16_TO_U32:
+ case BI_OPCODE_MKVEC_V2I16:
+ case BI_OPCODE_S16_TO_F32:
+ case BI_OPCODE_S16_TO_S32:
+ case BI_OPCODE_U16_TO_F32:
+ case BI_OPCODE_U16_TO_U32:
+ return (swizzle != BI_SWIZZLE_H00);
+
+ case BI_OPCODE_BRANCH_F32:
+ case BI_OPCODE_LOGB_F32:
+ case BI_OPCODE_ILOGB_F32:
+ case BI_OPCODE_FADD_F32:
+ case BI_OPCODE_FCMP_F32:
+ case BI_OPCODE_FREXPE_F32:
+ case BI_OPCODE_FREXPM_F32:
+ case BI_OPCODE_FROUND_F32:
+ return (swizzle != BI_SWIZZLE_H01);
+
+ case BI_OPCODE_IADD_S32:
+ case BI_OPCODE_IADD_U32:
+ case BI_OPCODE_ISUB_S32:
+ case BI_OPCODE_ISUB_U32:
+ case BI_OPCODE_IADD_V4S8:
+ case BI_OPCODE_IADD_V4U8:
+ case BI_OPCODE_ISUB_V4S8:
+ case BI_OPCODE_ISUB_V4U8:
+ return (src == 1) && (swizzle != BI_SWIZZLE_H01);
+
+ case BI_OPCODE_S8_TO_F32:
+ case BI_OPCODE_S8_TO_S32:
+ case BI_OPCODE_U8_TO_F32:
+ case BI_OPCODE_U8_TO_U32:
+ return (swizzle != BI_SWIZZLE_B0000);
+
+ case BI_OPCODE_V2S8_TO_V2F16:
+ case BI_OPCODE_V2S8_TO_V2S16:
+ case BI_OPCODE_V2U8_TO_V2F16:
+ case BI_OPCODE_V2U8_TO_V2U16:
+ return (swizzle != BI_SWIZZLE_B0022);
+
+ case BI_OPCODE_IADD_V2S16:
+ case BI_OPCODE_IADD_V2U16:
+ case BI_OPCODE_ISUB_V2S16:
+ case BI_OPCODE_ISUB_V2U16:
+ return (src == 1) && (swizzle >= BI_SWIZZLE_H11);
+
+#if 0
+ /* Restriction on IADD in 64-bit clauses on G72 */
+ case BI_OPCODE_IADD_S64:
+ case BI_OPCODE_IADD_U64:
+ return (src == 1) && (swizzle != BI_SWIZZLE_D0);
+#endif
+
+ default:
+ return false;
+ }
+}
+
ASSERTED static bool
bi_reads_t(bi_instr *ins, unsigned src)
{
@@ -640,6 +706,11 @@ bi_reads_t(bi_instr *ins, unsigned src)
if (src == 0 && bi_opcode_props[ins->op].sr_read)
return false;
+ /* Bifrost cores newer than Mali G71 have restrictions on swizzles on
+ * same-cycle temporaries. Check the list for these hazards. */
+ if (bi_impacted_t_modifiers(ins, src))
+ return false;
+
/* Descriptor must not come from a passthrough */
switch (ins->op) {
case BI_OPCODE_LD_CVT:
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