Mesa (main): iris: Use staging blits for reads from uncached buffers.

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Module: Mesa
Branch: main
Commit: 643c4ade4c39c8ba8c63651ee4a1549eeb96fdec
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=643c4ade4c39c8ba8c63651ee4a1549eeb96fdec

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu May 20 00:14:53 2021 -0700

iris: Use staging blits for reads from uncached buffers.

If we're doing CPU reads of a resource that doesn't have CPU caches
enabled for the mapping (say, in device local memory, or WC mapped),
then blit it to a temporary that does have those caches enabled.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10941>

---

 src/gallium/drivers/iris/iris_resource.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 988fcd8287c..efcc3a3a1b2 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -2069,8 +2069,12 @@ iris_transfer_map(struct pipe_context *ctx,
    if (fmtl->txc == ISL_TXC_ASTC)
       usage |= PIPE_MAP_DIRECTLY;
 
+   /* We can map directly if it wouldn't stall, there's no compression,
+    * and we aren't doing an uncached read.
+    */
    if (!map_would_stall &&
-       !isl_aux_usage_has_compression(res->aux.usage)) {
+       !isl_aux_usage_has_compression(res->aux.usage) &&
+       !((usage & PIPE_MAP_READ) && !res->bo->cache_coherent)) {
       usage |= PIPE_MAP_DIRECTLY;
    }