Mesa (main): vc4: Use the ra_alloc_contig_reg_class() function to speed up RA.

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Module: Mesa
Branch: main
Commit: 15aa8e9189871057c5bd5f0c51f7e1bfae87334c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=15aa8e9189871057c5bd5f0c51f7e1bfae87334c

Author: Eric Anholt <eric at anholt.net>
Date:   Thu Mar  4 16:50:26 2021 -0800

vc4: Use the ra_alloc_contig_reg_class() function to speed up RA.

It means we don't need to do the n^2 loop over the regs to set up the pq
values, nor do we need to allocate conflicts lists.

Acked-by: Erico Nunes <nunes.erico at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9437>

---

 src/gallium/drivers/vc4/vc4_register_allocate.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/vc4/vc4_register_allocate.c b/src/gallium/drivers/vc4/vc4_register_allocate.c
index 9613369a589..4f1ae63c1d1 100644
--- a/src/gallium/drivers/vc4/vc4_register_allocate.c
+++ b/src/gallium/drivers/vc4/vc4_register_allocate.c
@@ -115,20 +115,20 @@ vc4_alloc_reg_set(struct vc4_context *vc4)
         if (vc4->regs)
                 return;
 
-        vc4->regs = ra_alloc_reg_set(vc4, ARRAY_SIZE(vc4_regs), true);
+        vc4->regs = ra_alloc_reg_set(vc4, ARRAY_SIZE(vc4_regs), false);
 
         /* The physical regfiles split us into two classes, with [0] being the
          * whole space and [1] being the bottom half (for threaded fragment
          * shaders).
          */
         for (int i = 0; i < 2; i++) {
-                vc4->reg_class_any[i] = ra_alloc_reg_class(vc4->regs);
-                vc4->reg_class_a_or_b[i] = ra_alloc_reg_class(vc4->regs);
-                vc4->reg_class_a_or_b_or_acc[i] = ra_alloc_reg_class(vc4->regs);
-                vc4->reg_class_r4_or_a[i] = ra_alloc_reg_class(vc4->regs);
-                vc4->reg_class_a[i] = ra_alloc_reg_class(vc4->regs);
+                vc4->reg_class_any[i] = ra_alloc_contig_reg_class(vc4->regs, 1);
+                vc4->reg_class_a_or_b[i] = ra_alloc_contig_reg_class(vc4->regs, 1);
+                vc4->reg_class_a_or_b_or_acc[i] = ra_alloc_contig_reg_class(vc4->regs, 1);
+                vc4->reg_class_r4_or_a[i] = ra_alloc_contig_reg_class(vc4->regs, 1);
+                vc4->reg_class_a[i] = ra_alloc_contig_reg_class(vc4->regs, 1);
         }
-        vc4->reg_class_r0_r3 = ra_alloc_reg_class(vc4->regs);
+        vc4->reg_class_r0_r3 = ra_alloc_contig_reg_class(vc4->regs, 1);
 
         /* r0-r3 */
         for (uint32_t i = ACC_INDEX; i < ACC_INDEX + 4; i++) {