Mesa (staging/21.1): aco: do not clause NSA instructions

[GitLab Mirror]

Module: Mesa
Branch: staging/21.1
Commit: 0d224336f781b0ad8956c2def650f5caf0cb2f4f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d224336f781b0ad8956c2def650f5caf0cb2f4f

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Wed May 19 14:36:43 2021 +0100

aco: do not clause NSA instructions

According to LLVM, this has "unpredictable results on GFX10.1".

https://reviews.llvm.org/D102211

fossil-db (Navi10):
Totals from 26690 (17.81% of 149839) affected shaders:
CodeSize: 167935160 -> 167706280 (-0.14%); split: -0.14%, +0.00%
Instrs: 31801427 -> 31744142 (-0.18%); split: -0.18%, +0.00%
Latency: 732672435 -> 732622463 (-0.01%)
InvThroughput: 163361435 -> 163357838 (-0.00%); split: -0.00%, +0.00%
VClause: 546131 -> 546903 (+0.14%); split: -0.00%, +0.14%

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Fixes: c353895c922 ("aco: use non-sequential addressing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10898>
(cherry picked from commit 81162265b1d7f976c3810b420754ff8403f3aa18)

---

 .pick_status.json                          | 2 +-
 src/amd/compiler/README-ISA.md             | 4 ++++
 src/amd/compiler/aco_form_hard_clauses.cpp | 8 ++++----
 src/amd/compiler/tests/helpers.cpp         | 3 +++
 src/amd/compiler/tests/test_isel.cpp       | 2 +-
 5 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index cdf6db18649..1e5327ffa67 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1111,7 +1111,7 @@
         "description": "aco: do not clause NSA instructions",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "c353895c92270c0e2a6e2b849c24d558efae0d5e"
     },
diff --git a/src/amd/compiler/README-ISA.md b/src/amd/compiler/README-ISA.md
index 678759ff25c..a790522ba4f 100644
--- a/src/amd/compiler/README-ISA.md
+++ b/src/amd/compiler/README-ISA.md
@@ -246,3 +246,7 @@ or vice versa: DS instruction, then a branch, then a VMEM/GLOBAL/SCRATCH instruc
 
 Mitigated by:
 Only `s_waitcnt_vscnt null, 0`. Needed even if the first instruction is a load.
+
+### NSAClauseBug
+
+"MIMG-NSA in a hard clause has unpredictable results on GFX10.1"
diff --git a/src/amd/compiler/aco_form_hard_clauses.cpp b/src/amd/compiler/aco_form_hard_clauses.cpp
index e04895a238c..c9298087c3f 100644
--- a/src/amd/compiler/aco_form_hard_clauses.cpp
+++ b/src/amd/compiler/aco_form_hard_clauses.cpp
@@ -76,16 +76,16 @@ void form_hard_clauses(Program *program)
          unsigned resource = 0;
          clause_type type = clause_other;
          if (instr->isVMEM() && !instr->operands.empty()) {
-            resource = instr->operands[0].tempId();
-            type = clause_vmem;
+            if (program->chip_class == GFX10 && instr->isMIMG() && get_mimg_nsa_dwords(instr.get()) > 0)
+               type = clause_other;
+            else
+               type = clause_vmem;
          } else if (instr->isScratch() || instr->isGlobal()) {
             type = clause_vmem;
          } else if (instr->isFlat()) {
             type = clause_flat;
          } else if (instr->isSMEM() && !instr->operands.empty()) {
             type = clause_smem;
-            if (instr->operands[0].bytes() == 16)
-               resource = instr->operands[0].tempId();
          }
 
          if (type != current_type || resource != current_resource || num_instrs == 64) {
diff --git a/src/amd/compiler/tests/helpers.cpp b/src/amd/compiler/tests/helpers.cpp
index 6eb058ba131..e8376624fd8 100644
--- a/src/amd/compiler/tests/helpers.cpp
+++ b/src/amd/compiler/tests/helpers.cpp
@@ -245,6 +245,9 @@ VkDevice get_vk_device(enum chip_class chip_class)
    case GFX10:
       family = CHIP_NAVI10;
       break;
+   case GFX10_3:
+      family = CHIP_SIENNA_CICHLID;
+      break;
    default:
       family = CHIP_UNKNOWN;
       break;
diff --git a/src/amd/compiler/tests/test_isel.cpp b/src/amd/compiler/tests/test_isel.cpp
index 15ef8c81400..fed4138cd44 100644
--- a/src/amd/compiler/tests/test_isel.cpp
+++ b/src/amd/compiler/tests/test_isel.cpp
@@ -137,7 +137,7 @@ BEGIN_TEST(isel.gs.no_verts)
 END_TEST
 
 BEGIN_TEST(isel.sparse.clause)
-   for (unsigned i = GFX10; i <= GFX10; i++) {
+   for (unsigned i = GFX10_3; i <= GFX10_3; i++) {
       if (!set_variant((chip_class)i))
          continue;