Mesa (main): intel/isl: convert null surface fill to a struct.
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Tue Jun 8 03:01:43 UTC 2021
Module: Mesa
Branch: main
Commit: cb152e79f23b795803ae9ad432ab3ccfdcd6d84c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb152e79f23b795803ae9ad432ab3ccfdcd6d84c
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Jun 7 05:26:05 2021 +1000
intel/isl: convert null surface fill to a struct.
Suggested by Jason, pre-convert this to a struct so it can
be expanded for gen4/5 crocus support
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
---
src/gallium/drivers/iris/iris_state.c | 9 +++++----
src/intel/isl/isl.c | 6 +++---
src/intel/isl/isl.h | 12 ++++++++++--
src/intel/isl/isl_genX_priv.h | 3 ++-
src/intel/isl/isl_surface_state.c | 13 +++++++------
src/intel/vulkan/anv_device.c | 2 +-
src/intel/vulkan/genX_cmd_buffer.c | 2 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +-
8 files changed, 30 insertions(+), 19 deletions(-)
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 1f579308565..67929dd71bd 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -3212,9 +3212,9 @@ iris_set_framebuffer_state(struct pipe_context *ctx,
upload_state(ice->state.surface_uploader, &ice->state.null_fb,
4 * GENX(RENDER_SURFACE_STATE_length), 64);
isl_null_fill_state(&screen->isl_dev, null_surf_map,
- isl_extent3d(MAX2(cso->width, 1),
- MAX2(cso->height, 1),
- cso->layers ? cso->layers : 1));
+ .size = isl_extent3d(MAX2(cso->width, 1),
+ MAX2(cso->height, 1),
+ cso->layers ? cso->layers : 1));
ice->state.null_fb.offset +=
iris_bo_offset_from_base_address(iris_resource_bo(ice->state.null_fb.res));
@@ -8100,7 +8100,8 @@ genX(init_state)(struct iris_context *ice)
void *null_surf_map =
upload_state(ice->state.surface_uploader, &ice->state.unbound_tex,
4 * GENX(RENDER_SURFACE_STATE_length), 64);
- isl_null_fill_state(&screen->isl_dev, null_surf_map, isl_extent3d(1, 1, 1));
+ isl_null_fill_state(&screen->isl_dev, null_surf_map,
+ .size = isl_extent3d(1, 1, 1));
ice->state.unbound_tex.offset +=
iris_bo_offset_from_base_address(iris_resource_bo(ice->state.unbound_tex.res));
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 173c3563562..44b9aad7623 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -2275,10 +2275,10 @@ isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
}
void
-isl_null_fill_state(const struct isl_device *dev, void *state,
- struct isl_extent3d size)
+isl_null_fill_state_s(const struct isl_device *dev, void *state,
+ const struct isl_null_fill_state_info *restrict info)
{
- isl_genX_call(dev, null_fill_state, state, size);
+ isl_genX_call(dev, null_fill_state, state, info);
}
void
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index d5ce1a4124f..def32ece1f7 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1520,6 +1520,10 @@ struct isl_depth_stencil_hiz_emit_info {
enum isl_aux_usage stencil_aux_usage;
};
+struct isl_null_fill_state_info {
+ struct isl_extent3d size;
+};
+
extern const struct isl_format_layout isl_format_layouts[];
extern const char isl_format_names[];
extern const uint16_t isl_format_name_offsets[];
@@ -2086,8 +2090,12 @@ isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
const struct isl_buffer_fill_state_info *restrict info);
void
-isl_null_fill_state(const struct isl_device *dev, void *state,
- struct isl_extent3d size);
+isl_null_fill_state_s(const struct isl_device *dev, void *state,
+ const struct isl_null_fill_state_info *restrict info);
+
+#define isl_null_fill_state(dev, state, ...) \
+ isl_null_fill_state_s((dev), (state), \
+ &(struct isl_null_fill_state_info) { __VA_ARGS__ });
#define isl_emit_depth_stencil_hiz(dev, batch, ...) \
isl_emit_depth_stencil_hiz_s((dev), (batch), \
diff --git a/src/intel/isl/isl_genX_priv.h b/src/intel/isl/isl_genX_priv.h
index 1dc6093614a..c2a9b0439af 100644
--- a/src/intel/isl/isl_genX_priv.h
+++ b/src/intel/isl/isl_genX_priv.h
@@ -45,4 +45,5 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
const struct isl_depth_stencil_hiz_emit_info *restrict info);
void
-isl_genX(null_fill_state)(void *state, struct isl_extent3d size);
+isl_genX(null_fill_state)(void *state,
+ const struct isl_null_fill_state_info *restrict info);
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index 43a2b3c68ce..10c6d54a645 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -928,7 +928,8 @@ isl_genX(buffer_fill_state_s)(const struct isl_device *dev, void *state,
}
void
-isl_genX(null_fill_state)(void *state, struct isl_extent3d size)
+isl_genX(null_fill_state)(void *state,
+ const struct isl_null_fill_state_info *restrict info)
{
struct GENX(RENDER_SURFACE_STATE) s = {
.SurfaceType = SURFTYPE_NULL,
@@ -939,7 +940,7 @@ isl_genX(null_fill_state)(void *state, struct isl_extent3d size)
*/
.SurfaceFormat = ISL_FORMAT_R32_UINT,
#if GFX_VER >= 7
- .SurfaceArray = size.depth > 1,
+ .SurfaceArray = info->size.depth > 1,
#endif
#if GFX_VER >= 8
.TileMode = YMAJOR,
@@ -960,10 +961,10 @@ isl_genX(null_fill_state)(void *state, struct isl_extent3d size)
*/
.SurfaceVerticalAlignment = VALIGN_4,
#endif
- .Width = size.width - 1,
- .Height = size.height - 1,
- .Depth = size.depth - 1,
- .RenderTargetViewExtent = size.depth - 1,
+ .Width = info->size.width - 1,
+ .Height = info->size.height - 1,
+ .Depth = info->size.depth - 1,
+ .RenderTargetViewExtent = info->size.depth - 1,
#if GFX_VER <= 5
.ColorBufferComponentWriteDisables = 0xf,
#endif
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 56cd8341ad7..2545623c8ea 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -3270,7 +3270,7 @@ VkResult anv_CreateDevice(
device->isl_dev.ss.size,
device->isl_dev.ss.align);
isl_null_fill_state(&device->isl_dev, device->null_surface_state.map,
- isl_extent3d(1, 1, 1) /* This shouldn't matter */);
+ .size = isl_extent3d(1, 1, 1) /* This shouldn't matter */);
assert(device->null_surface_state.offset == 0);
anv_scratch_pool_init(device, &device->scratch_pool);
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 0b85735f5e2..60604a14eeb 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -5648,7 +5648,7 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
isl_null_fill_state(&cmd_buffer->device->isl_dev,
cmd_state->null_surface_state.map,
- isl_extent3d(fb->width, fb->height, fb->layers));
+ .size = isl_extent3d(fb->width, fb->height, fb->layers));
for (uint32_t i = 0; i < subpass->attachment_count; ++i) {
const uint32_t att = subpass->attachments[i].attachment;
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 028b4df7e05..5caeda5239a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -851,7 +851,7 @@ emit_null_surface_state(struct brw_context *brw,
if (devinfo->ver != 6 || samples <= 1) {
isl_null_fill_state(&brw->isl_dev, surf,
- isl_extent3d(width, height, 1));
+ .size = isl_extent3d(width, height, 1));
return;
}
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