Mesa (main): aco: disallow SDWA for instructions with 64-bit definitions/operands

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Module: Mesa
Branch: main
Commit: e9d1643288bfcec92f3cad5e4793ec1758b2a713
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9d1643288bfcec92f3cad5e4793ec1758b2a713

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Mon Jun  7 16:56:45 2021 +0100

aco: disallow SDWA for instructions with 64-bit definitions/operands

For example, v_cvt_f64_i32. LLVM doesn't seem to allow this either and it
doesn't seem to work correctly.

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>

---

 src/amd/compiler/aco_ir.cpp | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index 8aab589a458..5f6eb5c177d 100644
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -228,11 +228,18 @@ bool can_use_SDWA(chip_class chip, const aco_ptr<Instruction>& instr)
       }
    }
 
+   if (!instr->definitions.empty() && instr->definitions[0].bytes() > 4)
+      return false;
+
    if (!instr->operands.empty()) {
       if (instr->operands[0].isLiteral())
          return false;
       if (chip < GFX9 && !instr->operands[0].isOfType(RegType::vgpr))
          return false;
+      if (instr->operands[0].bytes() > 4)
+         return false;
+      if (instr->operands.size() > 1 && instr->operands[1].bytes() > 4)
+         return false;
    }
 
    bool is_mac = instr->opcode == aco_opcode::v_mac_f32 ||