Mesa (main): aco: Add note about v_alignbyte in the ISA README.
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Wed Jun 9 17:25:48 UTC 2021
Module: Mesa
Branch: main
Commit: 228169c87c62caaa8770482d95b2b79a904075ff
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=228169c87c62caaa8770482d95b2b79a904075ff
Author: Timur Kristóf <timur.kristof at gmail.com>
Date: Fri May 28 21:52:31 2021 +0200
aco: Add note about v_alignbyte in the ISA README.
We tried to use this instruction for a more optimal sequence,
but it turned out that it doesn't exactly work as it was
supposed to. This note is to help others who want to use it.
Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka at gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>
---
src/amd/compiler/README-ISA.md | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/src/amd/compiler/README-ISA.md b/src/amd/compiler/README-ISA.md
index c692fdf7e16..296ba7a864a 100644
--- a/src/amd/compiler/README-ISA.md
+++ b/src/amd/compiler/README-ISA.md
@@ -44,6 +44,18 @@ is written in the GCN3 reference guide:
D.u = CountOneBits(S0.u) + S1.u.
```
+## `v_alignbyte_b32`
+
+All versions of the ISA document are vague about it, but after some trial and
+error we discovered that only 2 bits of the 3rd operand are used.
+Therefore, this instruction can't shift more than 24 bits.
+
+The correct description of `v_alignbyte_b32` is probably the following:
+
+```
+D.u = ({S0, S1} >> (8 * S2.u[1:0])) & 0xffffffff
+```
+
## SMEM stores
The Vega ISA references doesn't say this (or doesn't make it clear), but
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