Mesa (main): nir: Add AMD-specific byte and lane permute intrinsics.
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Wed Jun 9 17:25:49 UTC 2021
Module: Mesa
Branch: main
Commit: 43ce80a58f8a6bd988e5bd15be2b6c2a30890af0
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=43ce80a58f8a6bd988e5bd15be2b6c2a30890af0
Author: Timur Kristóf <timur.kristof at gmail.com>
Date: Fri May 28 21:57:19 2021 +0200
nir: Add AMD-specific byte and lane permute intrinsics.
These map directly to v_perm_b32 and v_permlane_b32.
Unfortunately there is no corresponding NIR opcode or
intrinsics, and it's too tedious to puzzle these things
together from the existing NIR instructions.
Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka at gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>
---
src/compiler/nir/nir_divergence_analysis.c | 2 ++
src/compiler/nir/nir_intrinsics.py | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c
index 5e74846232e..c2da94ac5cf 100644
--- a/src/compiler/nir/nir_divergence_analysis.c
+++ b/src/compiler/nir/nir_divergence_analysis.c
@@ -294,6 +294,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_quad_swap_horizontal:
case nir_intrinsic_quad_swap_vertical:
case nir_intrinsic_quad_swap_diagonal:
+ case nir_intrinsic_byte_permute_amd:
case nir_intrinsic_load_deref:
case nir_intrinsic_load_shared:
case nir_intrinsic_load_global:
@@ -496,6 +497,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_ballot_bit_count_inclusive:
case nir_intrinsic_write_invocation_amd:
case nir_intrinsic_mbcnt_amd:
+ case nir_intrinsic_lane_permute_16_amd:
case nir_intrinsic_elect:
case nir_intrinsic_load_tlb_color_v3d:
case nir_intrinsic_load_tess_rel_patch_id_amd:
diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py
index 5cb2f60637a..4a5ce0847eb 100644
--- a/src/compiler/nir/nir_intrinsics.py
+++ b/src/compiler/nir/nir_intrinsics.py
@@ -429,6 +429,10 @@ intrinsic("masked_swizzle_amd", src_comp=[0], dest_comp=0, bit_sizes=src0,
intrinsic("write_invocation_amd", src_comp=[0, 0, 1], dest_comp=0, bit_sizes=src0,
flags=[CAN_ELIMINATE])
intrinsic("mbcnt_amd", src_comp=[1], dest_comp=1, bit_sizes=[32], flags=[CAN_ELIMINATE])
+# Compiled to v_perm_b32. src = [ in_bytes_hi, in_bytes_lo, selector ]
+intrinsic("byte_permute_amd", src_comp=[1, 1, 1], dest_comp=1, bit_sizes=[32], flags=[CAN_ELIMINATE, CAN_REORDER])
+# Compiled to v_permlane16_b32. src = [ value, lanesel_lo, lanesel_hi ]
+intrinsic("lane_permute_16_amd", src_comp=[1, 1, 1], dest_comp=1, bit_sizes=[32], flags=[CAN_ELIMINATE])
# Basic Geometry Shader intrinsics.
#
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