Mesa (main): freedreno/registers: add A5XX_RBBM_STATUS3 bit

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Module: Mesa
Branch: main
Commit: 476f86fcb283bd8afc4628785005bf8382eb0898
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=476f86fcb283bd8afc4628785005bf8382eb0898

Author: Rob Clark <robdclark at chromium.org>
Date:   Thu Jun 10 12:42:30 2021 -0700

freedreno/registers: add A5XX_RBBM_STATUS3 bit

Same bit as a6xx.

Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11311>

---

 src/freedreno/registers/adreno/a5xx.xml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/freedreno/registers/adreno/a5xx.xml b/src/freedreno/registers/adreno/a5xx.xml
index 5b544859874..a2a3c71364b 100644
--- a/src/freedreno/registers/adreno/a5xx.xml
+++ b/src/freedreno/registers/adreno/a5xx.xml
@@ -1366,7 +1366,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 		<bitfield high="1" low="1" name="CP_ME_BUSY" />
 		<bitfield high="0" low="0" name="HI_BUSY" />
 	</reg32>
-	<reg32 offset="0x0530" name="RBBM_STATUS3"/>
+	<reg32 offset="0x0530" name="RBBM_STATUS3">
+		<bitfield pos="24" name="SMMU_STALLED_ON_FAULT" type="boolean"/>
+	</reg32>
 	<reg32 offset="0x04e1" name="RBBM_INT_0_STATUS"/>
 	<reg32 offset="0x04f0" name="RBBM_AHB_ME_SPLIT_STATUS"/>
 	<reg32 offset="0x04f1" name="RBBM_AHB_PFP_SPLIT_STATUS"/>