Mesa (main): intel/isl: Make the offset helpers four dimensional
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gitlab-mirror at kemper.freedesktop.org
Fri Jun 11 21:12:18 UTC 2021
Module: Mesa
Branch: main
Commit: a4dafe1faddb569424c7d60fb8da96d0542cedca
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a4dafe1faddb569424c7d60fb8da96d0542cedca
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Feb 21 02:53:14 2018 -0800
intel/isl: Make the offset helpers four dimensional
We need to do this in order to handle Yf and Ys tiling because they use
a four-dimensional tile instead of laying everything out in two
dimensions.
v2 (Jason Ekstrand):
- Update functions added since v1:
- isl_surf_get_image_range_B_tile
- blorp_can_hiz_clear_depth
- get_image_offset_el
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com> (v1)
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
---
src/gallium/drivers/iris/iris_resource.c | 8 ++-
src/intel/blorp/blorp_blit.c | 8 ++-
src/intel/blorp/blorp_clear.c | 5 +-
src/intel/isl/isl.c | 77 ++++++++++++++++++----
src/intel/isl/isl.h | 37 ++++++++---
src/intel/isl/isl_storage_image.c | 6 +-
.../isl/tests/isl_surf_get_image_offset_test.c | 4 +-
src/mesa/drivers/dri/i965/brw_blit.c | 10 ++-
src/mesa/drivers/dri/i965/brw_mipmap_tree.c | 7 +-
9 files changed, 130 insertions(+), 32 deletions(-)
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 374b47595aa..f4bdc59d25a 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -1654,11 +1654,15 @@ static void
get_image_offset_el(const struct isl_surf *surf, unsigned level, unsigned z,
unsigned *out_x0_el, unsigned *out_y0_el)
{
+ ASSERTED uint32_t z0_el, a0_el;
if (surf->dim == ISL_SURF_DIM_3D) {
- isl_surf_get_image_offset_el(surf, level, 0, z, out_x0_el, out_y0_el);
+ isl_surf_get_image_offset_el(surf, level, 0, z,
+ out_x0_el, out_y0_el, &z0_el, &a0_el);
} else {
- isl_surf_get_image_offset_el(surf, level, z, 0, out_x0_el, out_y0_el);
+ isl_surf_get_image_offset_el(surf, level, z, 0,
+ out_x0_el, out_y0_el, &z0_el, &a0_el);
}
+ assert(z0_el == 0 && a0_el == 0);
}
/**
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 1e55aab6df0..281803a190b 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -2194,11 +2194,15 @@ shrink_surface_params(const struct isl_device *dev,
*/
x_offset_sa = (uint32_t)*x0 * px_size_sa.w + info->tile_x_sa;
y_offset_sa = (uint32_t)*y0 * px_size_sa.h + info->tile_y_sa;
+ uint32_t tile_z_sa, tile_a;
isl_tiling_get_intratile_offset_sa(info->surf.tiling,
info->surf.format, info->surf.row_pitch_B,
- x_offset_sa, y_offset_sa,
+ info->surf.array_pitch_el_rows,
+ x_offset_sa, y_offset_sa, 0, 0,
&byte_offset,
- &info->tile_x_sa, &info->tile_y_sa);
+ &info->tile_x_sa, &info->tile_y_sa,
+ &tile_z_sa, &tile_a);
+ assert(tile_z_sa == 0 && tile_a == 0);
info->addr.offset += byte_offset;
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index ad3fa3c352d..9ae60d3e0dd 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -832,11 +832,12 @@ blorp_can_hiz_clear_depth(const struct intel_device_info *devinfo,
* HIZ), we have to make sure that the x0 and y0 are at least 16x8
* aligned in the context of the entire surface.
*/
- uint32_t slice_x0, slice_y0;
+ uint32_t slice_x0, slice_y0, slice_z0, slice_a0;
isl_surf_get_image_offset_el(surf, level,
surf->dim == ISL_SURF_DIM_3D ? 0 : layer,
surf->dim == ISL_SURF_DIM_3D ? layer: 0,
- &slice_x0, &slice_y0);
+ &slice_x0, &slice_y0, &slice_z0, &slice_a0);
+ assert(slice_z0 == 0 && slice_a0 == 0);
const bool max_x1_y1 =
x1 == minify(surf->logical_level0_px.width, level) &&
y1 == minify(surf->logical_level0_px.height, level);
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 8e502be963e..dfc302e1eb6 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -2523,7 +2523,9 @@ isl_surf_get_image_offset_sa(const struct isl_surf *surf,
uint32_t logical_array_layer,
uint32_t logical_z_offset_px,
uint32_t *x_offset_sa,
- uint32_t *y_offset_sa)
+ uint32_t *y_offset_sa,
+ uint32_t *z_offset_sa,
+ uint32_t *array_offset)
{
assert(level < surf->levels);
assert(logical_array_layer < surf->logical_level0_px.array_len);
@@ -2534,21 +2536,29 @@ isl_surf_get_image_offset_sa(const struct isl_surf *surf,
case ISL_DIM_LAYOUT_GFX9_1D:
get_image_offset_sa_gfx9_1d(surf, level, logical_array_layer,
x_offset_sa, y_offset_sa);
+ *z_offset_sa = 0;
+ *array_offset = 0;
break;
case ISL_DIM_LAYOUT_GFX4_2D:
get_image_offset_sa_gfx4_2d(surf, level, logical_array_layer
+ logical_z_offset_px,
x_offset_sa, y_offset_sa);
+ *z_offset_sa = 0;
+ *array_offset = 0;
break;
case ISL_DIM_LAYOUT_GFX4_3D:
get_image_offset_sa_gfx4_3d(surf, level, logical_array_layer +
logical_z_offset_px,
x_offset_sa, y_offset_sa);
+ *z_offset_sa = 0;
+ *array_offset = 0;
break;
case ISL_DIM_LAYOUT_GFX6_STENCIL_HIZ:
get_image_offset_sa_gfx6_stencil_hiz(surf, level, logical_array_layer +
logical_z_offset_px,
x_offset_sa, y_offset_sa);
+ *z_offset_sa = 0;
+ *array_offset = 0;
break;
default:
@@ -2562,7 +2572,9 @@ isl_surf_get_image_offset_el(const struct isl_surf *surf,
uint32_t logical_array_layer,
uint32_t logical_z_offset_px,
uint32_t *x_offset_el,
- uint32_t *y_offset_el)
+ uint32_t *y_offset_el,
+ uint32_t *z_offset_el,
+ uint32_t *array_offset)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
@@ -2571,15 +2583,18 @@ isl_surf_get_image_offset_el(const struct isl_surf *surf,
assert(logical_z_offset_px
< isl_minify(surf->logical_level0_px.depth, level));
- uint32_t x_offset_sa, y_offset_sa;
+ uint32_t x_offset_sa, y_offset_sa, z_offset_sa;
isl_surf_get_image_offset_sa(surf, level,
logical_array_layer,
logical_z_offset_px,
&x_offset_sa,
- &y_offset_sa);
+ &y_offset_sa,
+ &z_offset_sa,
+ array_offset);
*x_offset_el = x_offset_sa / fmtl->bw;
*y_offset_el = y_offset_sa / fmtl->bh;
+ *z_offset_el = z_offset_sa / fmtl->bd;
}
void
@@ -2626,18 +2641,29 @@ isl_surf_get_image_offset_B_tile_el(const struct isl_surf *surf,
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
uint32_t total_x_offset_el, total_y_offset_el;
+ uint32_t total_z_offset_el, total_array_offset;
isl_surf_get_image_offset_el(surf, level, logical_array_layer,
logical_z_offset_px,
&total_x_offset_el,
- &total_y_offset_el);
+ &total_y_offset_el,
+ &total_z_offset_el,
+ &total_array_offset);
+ uint32_t z_offset_el, array_offset;
isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb,
surf->row_pitch_B,
+ surf->array_pitch_el_rows,
total_x_offset_el,
total_y_offset_el,
+ total_z_offset_el,
+ total_array_offset,
offset_B,
x_offset_el,
- y_offset_el);
+ y_offset_el,
+ &z_offset_el,
+ &array_offset);
+ assert(z_offset_el == 0);
+ assert(array_offset == 0);
}
void
@@ -2649,10 +2675,13 @@ isl_surf_get_image_range_B_tile(const struct isl_surf *surf,
uint32_t *end_tile_B)
{
uint32_t start_x_offset_el, start_y_offset_el;
+ uint32_t start_z_offset_el, start_array_slice;
isl_surf_get_image_offset_el(surf, level, logical_array_layer,
logical_z_offset_px,
&start_x_offset_el,
- &start_y_offset_el);
+ &start_y_offset_el,
+ &start_z_offset_el,
+ &start_array_slice);
/* Compute the size of the subimage in surface elements */
const uint32_t subimage_w_sa = isl_minify(surf->phys_level0_sa.w, level);
@@ -2665,22 +2694,36 @@ isl_surf_get_image_range_B_tile(const struct isl_surf *surf,
uint32_t end_x_offset_el = start_x_offset_el + subimage_w_el - 1;
uint32_t end_y_offset_el = start_y_offset_el + subimage_h_el - 1;
- UNUSED uint32_t x_offset_el, y_offset_el;
+ /* We only consider one Z or array slice */
+ const uint32_t end_z_offset_el = start_z_offset_el;
+ const uint32_t end_array_slice = start_array_slice;
+
+ UNUSED uint32_t x_offset_el, y_offset_el, z_offset_el, array_slice;
isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb,
surf->row_pitch_B,
+ surf->array_pitch_el_rows,
start_x_offset_el,
start_y_offset_el,
+ start_z_offset_el,
+ start_array_slice,
start_tile_B,
&x_offset_el,
- &y_offset_el);
+ &y_offset_el,
+ &z_offset_el,
+ &array_slice);
isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb,
surf->row_pitch_B,
+ surf->array_pitch_el_rows,
end_x_offset_el,
end_y_offset_el,
+ end_z_offset_el,
+ end_array_slice,
end_tile_B,
&x_offset_el,
- &y_offset_el);
+ &y_offset_el,
+ &z_offset_el,
+ &array_slice);
/* We want the range we return to be exclusive but the tile containing the
* last pixel (what we just calculated) is inclusive. Add one.
@@ -2735,18 +2778,26 @@ void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
uint32_t bpb,
uint32_t row_pitch_B,
+ uint32_t array_pitch_el_rows,
uint32_t total_x_offset_el,
uint32_t total_y_offset_el,
+ uint32_t total_z_offset_el,
+ uint32_t total_array_offset,
uint32_t *base_address_offset,
uint32_t *x_offset_el,
- uint32_t *y_offset_el)
+ uint32_t *y_offset_el,
+ uint32_t *z_offset_el,
+ uint32_t *array_offset)
{
if (tiling == ISL_TILING_LINEAR) {
assert(bpb % 8 == 0);
+ assert(total_z_offset_el == 0 && total_array_offset == 0);
*base_address_offset = total_y_offset_el * row_pitch_B +
total_x_offset_el * (bpb / 8);
*x_offset_el = 0;
*y_offset_el = 0;
+ *z_offset_el = 0;
+ *array_offset = 0;
return;
}
@@ -2770,6 +2821,10 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
/* Compute the offset into the tile */
*x_offset_el = total_x_offset_el % tile_info.logical_extent_el.w;
*y_offset_el = total_y_offset_el % tile_info.logical_extent_el.h;
+ assert(total_z_offset_el == 0);
+ assert(total_array_offset == 0);
+ *z_offset_el = 0;
+ *array_offset = 0;
/* Compute the offset of the tile in units of whole tiles */
uint32_t x_offset_tl = total_x_offset_el / tile_info.logical_extent_el.w;
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 937ea553733..9a16f6bca7e 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -2249,7 +2249,9 @@ isl_surf_get_image_offset_sa(const struct isl_surf *surf,
uint32_t logical_array_layer,
uint32_t logical_z_offset_px,
uint32_t *x_offset_sa,
- uint32_t *y_offset_sa);
+ uint32_t *y_offset_sa,
+ uint32_t *z_offset_sa,
+ uint32_t *array_offset);
/**
* Calculate the offset, in units of surface elements, to a subimage in the
@@ -2265,7 +2267,9 @@ isl_surf_get_image_offset_el(const struct isl_surf *surf,
uint32_t logical_array_layer,
uint32_t logical_z_offset_px,
uint32_t *x_offset_el,
- uint32_t *y_offset_el);
+ uint32_t *y_offset_el,
+ uint32_t *z_offset_el,
+ uint32_t *array_offset);
/**
* Calculate the offset, in bytes and intratile surface samples, to a
@@ -2366,21 +2370,31 @@ void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
uint32_t bpb,
uint32_t row_pitch_B,
+ uint32_t array_pitch_el_rows,
uint32_t total_x_offset_el,
uint32_t total_y_offset_el,
+ uint32_t total_z_offset_el,
+ uint32_t total_array_offset,
uint32_t *base_address_offset,
uint32_t *x_offset_el,
- uint32_t *y_offset_el);
+ uint32_t *y_offset_el,
+ uint32_t *z_offset_el,
+ uint32_t *array_offset);
static inline void
isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling,
enum isl_format format,
uint32_t row_pitch_B,
+ uint32_t array_pitch_el_rows,
uint32_t total_x_offset_sa,
uint32_t total_y_offset_sa,
+ uint32_t total_z_offset_sa,
+ uint32_t total_array_offset,
uint32_t *base_address_offset,
uint32_t *x_offset_sa,
- uint32_t *y_offset_sa)
+ uint32_t *y_offset_sa,
+ uint32_t *z_offset_sa,
+ uint32_t *array_offset)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(format);
@@ -2390,15 +2404,22 @@ isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling,
*/
assert(total_x_offset_sa % fmtl->bw == 0);
assert(total_y_offset_sa % fmtl->bh == 0);
- const uint32_t total_x_offset = total_x_offset_sa / fmtl->bw;
- const uint32_t total_y_offset = total_y_offset_sa / fmtl->bh;
+ const uint32_t total_x_offset_el = total_x_offset_sa / fmtl->bw;
+ const uint32_t total_y_offset_el = total_y_offset_sa / fmtl->bh;
+ const uint32_t total_z_offset_el = total_z_offset_sa / fmtl->bd;
isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb, row_pitch_B,
- total_x_offset, total_y_offset,
+ array_pitch_el_rows,
+ total_x_offset_el,
+ total_y_offset_el,
+ total_z_offset_el,
+ total_array_offset,
base_address_offset,
- x_offset_sa, y_offset_sa);
+ x_offset_sa, y_offset_sa,
+ z_offset_sa, array_offset);
*x_offset_sa *= fmtl->bw;
*y_offset_sa *= fmtl->bh;
+ *z_offset_sa *= fmtl->bd;
}
/**
diff --git a/src/intel/isl/isl_storage_image.c b/src/intel/isl/isl_storage_image.c
index 3021211b49b..356a5ae8f19 100644
--- a/src/intel/isl/isl_storage_image.c
+++ b/src/intel/isl/isl_storage_image.c
@@ -240,12 +240,16 @@ isl_surf_fill_image_param(const struct isl_device *dev,
view->array_len :
isl_minify(surf->logical_level0_px.d, view->base_level);
+ uint32_t tile_z_el, phys_array_layer;
isl_surf_get_image_offset_el(surf, view->base_level,
surf->dim == ISL_SURF_DIM_3D ?
0 : view->base_array_layer,
surf->dim == ISL_SURF_DIM_3D ?
view->base_array_layer : 0,
- ¶m->offset[0], ¶m->offset[1]);
+ ¶m->offset[0], ¶m->offset[1],
+ &tile_z_el, &phys_array_layer);
+ assert(tile_z_el == 0);
+ assert(phys_array_layer == 0);
const int cpp = isl_format_get_layout(surf->format)->bpb / 8;
param->stride[0] = cpp;
diff --git a/src/intel/isl/tests/isl_surf_get_image_offset_test.c b/src/intel/isl/tests/isl_surf_get_image_offset_test.c
index a03e6d74498..973ea940913 100644
--- a/src/intel/isl/tests/isl_surf_get_image_offset_test.c
+++ b/src/intel/isl/tests/isl_surf_get_image_offset_test.c
@@ -85,9 +85,9 @@ t_assert_offset_el(const struct isl_surf *surf,
uint32_t expected_x_offset_el,
uint32_t expected_y_offset_el)
{
- uint32_t x, y;
+ uint32_t x, y, z, a;
isl_surf_get_image_offset_el(surf, level, logical_array_layer,
- logical_z_offset_px, &x, &y);
+ logical_z_offset_px, &x, &y, &z, &a);
t_assert(x == expected_x_offset_el);
t_assert(y == expected_y_offset_el);
diff --git a/src/mesa/drivers/dri/i965/brw_blit.c b/src/mesa/drivers/dri/i965/brw_blit.c
index ff689941603..0539b72ef93 100644
--- a/src/mesa/drivers/dri/i965/brw_blit.c
+++ b/src/mesa/drivers/dri/i965/brw_blit.c
@@ -168,11 +168,17 @@ get_blit_intratile_offset_el(const struct brw_context *brw,
uint32_t *x_offset_el,
uint32_t *y_offset_el)
{
+ ASSERTED uint32_t z_offset_el, array_offset;
isl_tiling_get_intratile_offset_el(mt->surf.tiling,
mt->cpp * 8, mt->surf.row_pitch_B,
- total_x_offset_el, total_y_offset_el,
+ mt->surf.array_pitch_el_rows,
+ total_x_offset_el, total_y_offset_el, 0, 0,
base_address_offset,
- x_offset_el, y_offset_el);
+ x_offset_el, y_offset_el,
+ &z_offset_el, &array_offset);
+ assert(z_offset_el == 0);
+ assert(array_offset == 0);
+
if (mt->surf.tiling == ISL_TILING_LINEAR) {
/* From the Broadwell PRM docs for XY_SRC_COPY_BLT::SourceBaseAddress:
*
diff --git a/src/mesa/drivers/dri/i965/brw_mipmap_tree.c b/src/mesa/drivers/dri/i965/brw_mipmap_tree.c
index c2983854f8f..31949e41a2a 100644
--- a/src/mesa/drivers/dri/i965/brw_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/brw_mipmap_tree.c
@@ -1132,7 +1132,7 @@ brw_miptree_get_image_offset(const struct brw_mipmap_tree *mt,
return;
}
- uint32_t x_offset_sa, y_offset_sa;
+ uint32_t x_offset_sa, y_offset_sa, z_offset_sa, array_offset;
/* Miptree itself can have an offset only if it represents a single
* slice in an imported buffer object.
@@ -1150,10 +1150,13 @@ brw_miptree_get_image_offset(const struct brw_mipmap_tree *mt,
const unsigned z = mt->surf.dim == ISL_SURF_DIM_3D ? slice : 0;
slice = mt->surf.dim == ISL_SURF_DIM_3D ? 0 : slice;
isl_surf_get_image_offset_el(&mt->surf, level, slice, z,
- &x_offset_sa, &y_offset_sa);
+ &x_offset_sa, &y_offset_sa,
+ &z_offset_sa, &array_offset);
*x = x_offset_sa;
*y = y_offset_sa;
+ assert(z_offset_sa == 0);
+ assert(array_offset == 0);
}
/**
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