Mesa (main): i965: Use nir_lower_passthrough_edgeflags

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Module: Mesa
Branch: main
Commit: e23b55c3f02851aad6deba746ff9e8598d6f78de
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e23b55c3f02851aad6deba746ff9e8598d6f78de

Author: Jason Ekstrand <jason at jlekstrand.net>
Date:   Thu Jun 10 22:53:26 2021 -0500

i965: Use nir_lower_passthrough_edgeflags

Now that there's a common NIR pass, there's no point in us doing this in
the back-end anymore.  In order to use this pass in i965, we do have to
make one tiny change.  Gallium runs the pass after assigning input and
output locations and so needs the pass to respect those locations and
num_inputs.  i965, however, runs it before any location assignment or
I/O lowering so we don't care.  We do, however, need the pass to succeed
with num_inputs == 0 because we set that later.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11313>

---

 src/compiler/nir/nir_lower_passthrough_edgeflags.c |  7 +++++--
 src/intel/compiler/brw_vec4.cpp                    | 15 ---------------
 src/intel/compiler/brw_vec4_visitor.cpp            | 14 --------------
 src/mesa/drivers/dri/i965/brw_vs.c                 |  7 +++----
 4 files changed, 8 insertions(+), 35 deletions(-)

diff --git a/src/compiler/nir/nir_lower_passthrough_edgeflags.c b/src/compiler/nir/nir_lower_passthrough_edgeflags.c
index addd6bbeb2d..1fd2cd20014 100644
--- a/src/compiler/nir/nir_lower_passthrough_edgeflags.c
+++ b/src/compiler/nir/nir_lower_passthrough_edgeflags.c
@@ -35,8 +35,11 @@ lower_impl(nir_function_impl *impl)
    nir_builder_init(&b, impl);
    b.cursor = nir_before_cf_list(&impl->body);
 
-   /* The edge flag is the last input in st/mesa. */
-   assert(shader->num_inputs == util_bitcount64(shader->info.inputs_read));
+   /* The edge flag is the last input in st/mesa.  This code is also called by
+    * i965 which calls it before any input locations are assigned.
+    */
+   assert(shader->num_inputs == 0 ||
+          shader->num_inputs == util_bitcount64(shader->info.inputs_read));
 
    /* Lowered IO only uses intrinsics. It doesn't use variables. */
    if (shader->info.io_lowered) {
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
index 56031942fb0..8fefecd6429 100644
--- a/src/intel/compiler/brw_vec4.cpp
+++ b/src/intel/compiler/brw_vec4.cpp
@@ -2902,21 +2902,6 @@ brw_compile_vs(const struct brw_compiler *compiler,
 
    const unsigned *assembly = NULL;
 
-   if (prog_data->base.vue_map.varying_to_slot[VARYING_SLOT_EDGE] != -1) {
-      /* If the output VUE map contains VARYING_SLOT_EDGE then we need to copy
-       * the edge flag from VERT_ATTRIB_EDGEFLAG.  This will be done
-       * automatically by brw_vec4_visitor::emit_urb_slot but we need to
-       * ensure that prog_data->inputs_read is accurate.
-       *
-       * In order to make late NIR passes aware of the change, we actually
-       * whack shader->info.inputs_read instead.  This is safe because we just
-       * made a copy of the shader.
-       */
-      assert(!is_scalar);
-      assert(key->copy_edgeflag);
-      nir->info.inputs_read |= VERT_BIT_EDGEFLAG;
-   }
-
    prog_data->inputs_read = nir->info.inputs_read;
    prog_data->double_inputs_read = nir->info.vs.double_inputs;
 
diff --git a/src/intel/compiler/brw_vec4_visitor.cpp b/src/intel/compiler/brw_vec4_visitor.cpp
index 16590047c4d..e980c2c29f4 100644
--- a/src/intel/compiler/brw_vec4_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_visitor.cpp
@@ -1219,20 +1219,6 @@ vec4_visitor::emit_urb_slot(dst_reg reg, int varying)
       if (output_reg[VARYING_SLOT_POS][0].file != BAD_FILE)
          emit(MOV(reg, src_reg(output_reg[VARYING_SLOT_POS][0])));
       break;
-   case VARYING_SLOT_EDGE: {
-      /* This is present when doing unfilled polygons.  We're supposed to copy
-       * the edge flag from the user-provided vertex array
-       * (glEdgeFlagPointer), or otherwise we'll copy from the current value
-       * of that attribute (starts as 1.0f).  This is then used in clipping to
-       * determine which edges should be drawn as wireframe.
-       */
-      current_annotation = "edge flag";
-      int edge_attr = util_bitcount64(nir->info.inputs_read &
-                                        BITFIELD64_MASK(VERT_ATTRIB_EDGEFLAG));
-      emit(MOV(reg, src_reg(dst_reg(ATTR, edge_attr,
-                                    glsl_type::float_type, WRITEMASK_XYZW))));
-      break;
-   }
    case BRW_VARYING_SLOT_PAD:
       /* No need to write to this slot */
       break;
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index da37cfe11ac..050bf7d36a5 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -76,10 +76,6 @@ brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key,
    const struct intel_device_info *devinfo = &brw->screen->devinfo;
    GLbitfield64 outputs_written = user_varyings;
 
-   if (key->copy_edgeflag) {
-      outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
-   }
-
    if (devinfo->ver < 6) {
       /* Put dummy slots into the VUE for the SF to put the replaced
        * point sprite coords in.  We shouldn't need these dummy slots,
@@ -156,6 +152,9 @@ brw_codegen_vs_prog(struct brw_context *brw,
                                     &prog_data.base.base);
    }
 
+   if (key->copy_edgeflag)
+      nir_lower_passthrough_edgeflags(nir);
+
    uint64_t outputs_written =
       brw_vs_outputs_written(brw, key, nir->info.outputs_written);