Mesa (main): r600/sfn: don't read back unused image atomic result values
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Thu Jun 17 11:05:56 UTC 2021
Module: Mesa
Branch: main
Commit: 2e8901a07228d235bedc50cf69613e35183a4fac
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e8901a07228d235bedc50cf69613e35183a4fac
Author: Gert Wollny <gert.wollny at collabora.com>
Date: Sun Jun 13 14:15:31 2021 +0200
r600/sfn: don't read back unused image atomic result values
Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11348>
---
.../drivers/r600/sfn/sfn_emitssboinstruction.cpp | 105 +++++++++++++++------
.../drivers/r600/sfn/sfn_emitssboinstruction.h | 2 +
2 files changed, 77 insertions(+), 30 deletions(-)
diff --git a/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp b/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp
index d884691d726..2df9fa5a4ca 100644
--- a/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp
@@ -229,6 +229,44 @@ EmitSSBOInstruction::get_rat_opcode(const nir_intrinsic_op opcode, pipe_format f
}
}
+RatInstruction::ERatOp
+EmitSSBOInstruction::get_rat_opcode_wo(const nir_intrinsic_op opcode, pipe_format format) const
+{
+ switch (opcode) {
+ case nir_intrinsic_ssbo_atomic_add:
+ case nir_intrinsic_image_atomic_add:
+ return RatInstruction::ADD;
+ case nir_intrinsic_ssbo_atomic_and:
+ case nir_intrinsic_image_atomic_and:
+ return RatInstruction::AND;
+ case nir_intrinsic_ssbo_atomic_or:
+ case nir_intrinsic_image_atomic_or:
+ return RatInstruction::OR;
+ case nir_intrinsic_ssbo_atomic_imin:
+ case nir_intrinsic_image_atomic_imin:
+ return RatInstruction::MIN_INT;
+ case nir_intrinsic_ssbo_atomic_imax:
+ case nir_intrinsic_image_atomic_imax:
+ return RatInstruction::MAX_INT;
+ case nir_intrinsic_ssbo_atomic_umin:
+ case nir_intrinsic_image_atomic_umin:
+ return RatInstruction::MIN_UINT;
+ case nir_intrinsic_ssbo_atomic_umax:
+ case nir_intrinsic_image_atomic_umax:
+ return RatInstruction::MAX_UINT;
+ case nir_intrinsic_ssbo_atomic_xor:
+ case nir_intrinsic_image_atomic_xor:
+ return RatInstruction::XOR;
+ case nir_intrinsic_ssbo_atomic_comp_swap:
+ case nir_intrinsic_image_atomic_comp_swap:
+ if (util_format_is_float(format))
+ return RatInstruction::CMPXCHG_FLT;
+ else
+ return RatInstruction::CMPXCHG_INT;
+ default:
+ unreachable("Unsupported WO RAT instruction");
+ }
+}
bool EmitSSBOInstruction::emit_atomic_add(const nir_intrinsic_instr* instr)
{
@@ -408,8 +446,9 @@ EmitSSBOInstruction::emit_ssbo_atomic_op(const nir_intrinsic_instr *intrin)
else
image_offset = from_nir(intrin->src[0], 0);
- auto opcode = EmitSSBOInstruction::get_rat_opcode(intrin->intrinsic, PIPE_FORMAT_R32_UINT);
-
+ bool read_result = !intrin->dest.is_ssa || !list_is_empty(&intrin->dest.ssa.uses);
+ auto opcode = read_result ? get_rat_opcode(intrin->intrinsic, PIPE_FORMAT_R32_UINT) :
+ get_rat_opcode_wo(intrin->intrinsic, PIPE_FORMAT_R32_UINT);
auto coord_orig = from_nir(intrin->src[1], 0, 0);
auto coord = get_temp_register(0);
@@ -433,33 +472,37 @@ EmitSSBOInstruction::emit_ssbo_atomic_op(const nir_intrinsic_instr *intrin)
auto atomic = new RatInstruction(cf_mem_rat, opcode, m_rat_return_address, out_vec, imageid + m_ssbo_image_offset,
image_offset, 1, 0xf, 0, true);
emit_instruction(atomic);
- emit_instruction(new WaitAck(0));
- GPRVector dest = vec_from_nir(intrin->dest, intrin->dest.ssa.num_components);
- auto fetch = new FetchInstruction(vc_fetch,
- no_index_offset,
- fmt_32,
- vtx_nf_int,
- vtx_es_none,
- m_rat_return_address.reg_i(1),
- dest,
- 0,
- false,
- 0xf,
- R600_IMAGE_IMMED_RESOURCE_OFFSET + imageid,
- 0,
- bim_none,
- false,
- false,
- 0,
- 0,
- 0,
- image_offset,
- {0,7,7,7});
- fetch->set_flag(vtx_srf_mode);
- fetch->set_flag(vtx_use_tc);
- fetch->set_flag(vtx_vpm);
- emit_instruction(fetch);
+ if (read_result) {
+ emit_instruction(new WaitAck(0));
+
+ GPRVector dest = vec_from_nir(intrin->dest, intrin->dest.ssa.num_components);
+ auto fetch = new FetchInstruction(vc_fetch,
+ no_index_offset,
+ fmt_32,
+ vtx_nf_int,
+ vtx_es_none,
+ m_rat_return_address.reg_i(1),
+ dest,
+ 0,
+ false,
+ 0xf,
+ R600_IMAGE_IMMED_RESOURCE_OFFSET + imageid,
+ 0,
+ bim_none,
+ false,
+ false,
+ 0,
+ 0,
+ 0,
+ image_offset,
+ {0,7,7,7});
+ fetch->set_flag(vtx_srf_mode);
+ fetch->set_flag(vtx_use_tc);
+ fetch->set_flag(vtx_vpm);
+ emit_instruction(fetch);
+ }
+
return true;
}
@@ -475,7 +518,9 @@ EmitSSBOInstruction::emit_image_load(const nir_intrinsic_instr *intrin)
else
image_offset = from_nir(intrin->src[0], 0);
- auto rat_op = get_rat_opcode(intrin->intrinsic, nir_intrinsic_format(intrin));
+ bool read_retvalue = !intrin->dest.is_ssa || !list_is_empty(&intrin->dest.ssa.uses);
+ auto rat_op = read_retvalue ? get_rat_opcode(intrin->intrinsic, nir_intrinsic_format(intrin)):
+ get_rat_opcode_wo(intrin->intrinsic, nir_intrinsic_format(intrin));
GPRVector::Swizzle swz = {0,1,2,3};
auto coord = vec_from_nir_with_fetch_constant(intrin->src[1], 0xf, swz);
@@ -502,7 +547,7 @@ EmitSSBOInstruction::emit_image_load(const nir_intrinsic_instr *intrin)
auto store = new RatInstruction(cf_op, rat_op, m_rat_return_address, coord, imageid,
image_offset, 1, 0xf, 0, true);
emit_instruction(store);
- return fetch_return_value(intrin);
+ return read_retvalue ? fetch_return_value(intrin) : true;
}
bool EmitSSBOInstruction::fetch_return_value(const nir_intrinsic_instr *intrin)
diff --git a/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.h b/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.h
index 56e0e31f112..86ee1b40e4a 100644
--- a/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.h
+++ b/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.h
@@ -41,6 +41,8 @@ private:
ESDOp get_opcode(nir_intrinsic_op opcode);
RatInstruction::ERatOp get_rat_opcode(const nir_intrinsic_op opcode, pipe_format format) const;
+ RatInstruction::ERatOp get_rat_opcode_wo(const nir_intrinsic_op opcode, pipe_format format) const;
+
GPRVector make_dest(const nir_intrinsic_instr* instr);
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