Mesa (main): pan/mdg: Reorder some code in mir_spill_register

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Module: Mesa
Branch: main
Commit: ed9a9a09f2899baadbcf700352a70df677f658ef
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed9a9a09f2899baadbcf700352a70df677f658ef

Author: Icecream95 <ixn at disroot.org>
Date:   Mon Jun  7 19:25:42 2021 +1200

pan/mdg: Reorder some code in mir_spill_register

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11212>

---

 src/panfrost/midgard/midgard_ra.c | 33 +++++++++++++++++----------------
 1 file changed, 17 insertions(+), 16 deletions(-)

diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c
index 01e040b10d9..ae4f87342e2 100644
--- a/src/panfrost/midgard/midgard_ra.c
+++ b/src/panfrost/midgard/midgard_ra.c
@@ -862,6 +862,13 @@ mir_spill_register(
         /* Allocate TLS slot (maybe) */
         unsigned spill_slot = !is_special ? (*spill_count)++ : 0;
 
+        /* For special reads, figure out how many bytes we need */
+        unsigned read_bytemask = 0;
+
+        mir_foreach_instr_global_safe(ctx, ins) {
+                read_bytemask |= mir_bytemask_of_read_components(ins, spill_node);
+        }
+
         /* For TLS, replace all stores to the spilled node. For
          * special reads, just keep as-is; the class will be demoted
          * implicitly. For special writes, spill to a work register */
@@ -875,8 +882,6 @@ mir_spill_register(
                 mir_foreach_instr_in_block_safe(block, ins) {
                         if (ins->dest != spill_node) continue;
 
-                        midgard_instruction st;
-
                         /* Note: it's important to match the mask of the spill
                          * with the mask of the instruction whose destination
                          * we're spilling, or otherwise we'll read invalid
@@ -884,20 +889,23 @@ mir_spill_register(
                          */
 
                         if (is_special_w) {
-                                st = v_mov(spill_node, spill_slot);
+                                midgard_instruction st = v_mov(spill_node, spill_slot);
                                 st.no_spill |= (1 << spill_class);
                                 st.mask = ins->mask;
                                 st.dest_type = st.src_types[1] = ins->dest_type;
+
+                                /* Hint: don't rewrite this node */
+                                st.hint = true;
+
+                                mir_insert_instruction_after_scheduled(ctx, block, ins, st);
                         } else {
                                 ins->dest = spill_index++;
                                 ins->no_spill |= (1 << spill_class);
-                                st = v_load_store_scratch(ins->dest, spill_slot, true, ins->mask);
-                        }
-
-                        /* Hint: don't rewrite this node */
-                        st.hint = true;
 
-                        mir_insert_instruction_after_scheduled(ctx, block, ins, st);
+                                midgard_instruction st =
+                                        v_load_store_scratch(ins->dest, spill_slot, true, ins->mask);
+                                mir_insert_instruction_after_scheduled(ctx, block, ins, st);
+                        }
 
                         if (!is_special)
                                 ctx->spills++;
@@ -905,13 +913,6 @@ mir_spill_register(
                 }
         }
 
-        /* For special reads, figure out how many bytes we need */
-        unsigned read_bytemask = 0;
-
-        mir_foreach_instr_global_safe(ctx, ins) {
-                read_bytemask |= mir_bytemask_of_read_components(ins, spill_node);
-        }
-
         /* Insert a load from TLS before the first consecutive
          * use of the node, rewriting to use spilled indices to
          * break up the live range. Or, for special, insert a