Mesa (main): intel/fs: Implement Wa_14013745556 on TGL+.
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Wed Jun 23 08:15:44 UTC 2021
Module: Mesa
Branch: main
Commit: 4dc42843423aa6b0771f863c3359c44810424d63
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4dc42843423aa6b0771f863c3359c44810424d63
Author: Francisco Jerez <currojerez at riseup.net>
Date: Mon May 24 23:21:10 2021 -0700
intel/fs: Implement Wa_14013745556 on TGL+.
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11433>
---
src/intel/compiler/brw_fs_generator.cpp | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index b0cabe48c42..a3f86e07992 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1969,6 +1969,23 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
inst->dst.is_accumulator();
}
+ /* Wa_14013745556:
+ *
+ * Always use @1 SWSB for EOT.
+ */
+ if (inst->eot && devinfo->ver >= 12) {
+ if (tgl_swsb_src_dep(swsb).mode) {
+ brw_set_default_exec_size(p, BRW_EXECUTE_1);
+ brw_set_default_mask_control(p, BRW_MASK_DISABLE);
+ brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
+ brw_set_default_swsb(p, tgl_swsb_src_dep(swsb));
+ brw_SYNC(p, TGL_SYNC_NOP);
+ last_insn_offset = p->next_insn_offset;
+ }
+
+ swsb = tgl_swsb_dst_dep(swsb, 1);
+ }
+
if (unlikely(debug_flag))
disasm_annotate(disasm_info, inst, p->next_insn_offset);
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